MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 61

• Manufacturer Part Number: MSC8157ETVT1000A
• Description: Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
• Manufacturer: Freescale Semiconductor

Specifications of MSC8157ETVT1000A

• Rohs: yes
• Core: SC3850
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 0.97 V to 1.05 V
• Maximum Operating Temperature: + 105 C
• Package / Case: FCPBGA-783
• Mounting Style: SMD/SMT

transmitter specifications for 2.5 Gbps are defined in
Gbps, the transmitter specifications are defined in
Freescale Semiconductor
At recommended operating conditions (see
At recommended operating conditions (see
Differential peak-to-peak output
voltage swing
De-emphasized differential output
voltage (ratio)
DC differential Tx impedance
DC single-ended TX impedance
Differential input peak-to-peak voltage
DC differential Input Impedance
DC input impedance
Powered down DC input impedance
Electrical idle detect threshold
Notes:
1.
2.
3.
4.
5.
Table 11. PCI Express (2.5 Gbps) Differential Transmitter (Tx) Output DC Specifications
Parameter
V
Rx DC differential mode impedance. Impedance during all LTSSM states. When transitioning from a fundamental reset to
detect (the initial state of the LTSSM), there is a 5 ms transition time before the receiver termination values must be met on all
unconfigured lanes of a port.
Required Rx D+ as well as D– DC Impedance (50 ±20% tolerance). Measured at the package pins with a test load of 50 Ω to
GND on each pin. Impedance during all LTSSM states. When transitioning from a fundamental reset to detect (the initial state
of the LTSSM), there is a 5 ms transition time before the receiver termination values must be met on all unconfigured lanes of a
port.
Required Rx D+ as well as D– DC Impedance when the receiver terminations do not have power. The Rx DC common mode
impedance that exists when no power is present or fundamental reset is asserted. This helps ensure that the receiver detect
circuit does not falsely assume a receiver is powered on when it is not. This term must be measured at 300 mV above the Rx
ground.
V
Table 12. PCI Express (2.5 Gbps) Differential Receiver (Rx) Input DC Specifications
Parameter
RX-DIFFp-p
RX-IDLE-DET-DIFFp-p
= 2 × |V
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
RX-D+
= 2 × |V
– V
Z
V
V
TX-DIFF-DC
TX-DE-RATI
Symbol
TX-DIFFp-p
Table
Table
RX-D+
Z
RX-D-
TX-DC
V
O
RX-IDLE-DET-DIFFp-p
Z
4).
4).
| Measured at the package pins with a test load of 50 Ω to GND on each pin.
– V
RX-HIGH-IMP-DC
Z
V
RX-DIFF-DC
RX-D–
Symbol
RX-DIFFp-p
Z
RX-DC
Table 13
Min
800
|. Measured at the package pins of the receiver
3.0
80
40
Table 11
and the receiver specifications are defined in
and the receiver specifications are defined in
Nom
1000
100
3.5
50
Min
120
80
40
50
65
1200
Max
120
4.0
60
Nom
1000
100
50
—
—
Units
mV
dB
Ω
Ω
V
Measured at the package pins with
a test load of 50 Ω to GND on each
pin.
Ratio of the V
second and following bits after a
transition divided by the V
of the first bit after a transition.
Measured at the package pins with
a test load of 50 Ω to GND on each
pin.
Tx DC differential mode low
Impedance
Required Tx D+ as well as D– DC
Impedance during all states
TX-DIFFp-p
1200
Max
120
175
60
—
Electrical Characteristics
= 2 × |V
Condition
TX-DIFFp-p
Table
Units
Table
mV
ΚΩ
mV
Ω
Ω
TX-D+
14.
12. For 5
of the
TX-DIFFp-p
– V
Notes
TX-D–
1
2
3
4
5
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