MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 55

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MSC8157ETVT1000A

Manufacturer Part Number
MSC8157ETVT1000A
Description
Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MSC8157ETVT1000A

Rohs
yes
Core
SC3850
Data Bus Width
32 bit
Program Memory Size
32 KB
Data Ram Size
512 KB
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
0.97 V to 1.05 V
Maximum Operating Temperature
+ 105 C
Package / Case
FCPBGA-783
Mounting Style
SMD/SMT

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3.5.1
This section describes the DC electrical specifications for the DDR SDRAM interface of the MSC8157.
recommended operating conditions for the DDR SDRAM controller when interfacing to DDR3 SDRAM.
Table 8
Table 9
3.5.2
The MSC8157 features an HSSI that includes one 10-channel SerDes port (lanes A through J) used for high-speed serial
interface applications (PCI Express, Serial RapidIO interfaces, CPRI, and SGMII). This section and its subsections describe the
common portion of the SerDes DC, including the DC requirements for the SerDes reference clocks and the SerDes data lane
Freescale Semiconductor
At recommended operating conditions (see
At recommended operating conditions (see
At recommended operating conditions (see
I/O reference voltage
Input high voltage
Input low voltage
Output high current (V
Output low current (V
I/O leakage current
Notes:
I/O capacitance: DQ, DQS, DQS
Delta I/O capacitance: DQ, DQS, DQS
Note:
Current draw for MV
.
provides the DDR controller interface capacitance for DDR3 memory.
lists the current draw characteristics for
1.
2.
3.
4.
5.
6.
7.
8.
Guaranteed by FAB process and micro-construction.
Parameter/Condition
V
different sources.
MV
noise on MV
V
equal to MV
in the DC-level of MV
The voltage regulator for MV
Input capacitance load for DQ, DQS, and DQS signals are available in the IBIS models.
I
Refer to the IBIS model for the complete output IV curve characteristics.
Output leakage is measured with all outputs are disabled, 0 V
DDR SDRAM Electrical Characteristics
High-Speed Serial Interface (HSSI) DC Electrical Characteristics
OH
DDDDR
TT
REF
and I
is not applied directly to the device. It is the supply to which the far end signal termination is made and is expected to be
is expected to be equal to 0.5 × V
REF
OUT
is expected to be within 50 mV of the DRAM V
OL
Parameter
OUT
Parameter / Condition
REF
are measured at VDDDDR = 1.425 V.
REF
= 0.7125 V)
Table 7. DDR3 SDRAM Interface DC Electrical Characteristics
= 0.7125 V)
with a minimum value of MV
may not exceed 1% of the V
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
REF
Table 9. Current Draw Characteristics for MV
.
Table
Table
Table
REF
Table 8. DDR3 SDRAM Capacitance
must meet the specifications stated in
4) with GVDD = 1.5 V.
4) with VDDDDR = 1.5 V.
4).
MV
DDDDR
REF
Symbol
MV
REF
DDDDR
V
I
V
I
I
.
OH
OL
OZ
IH
REF
IL
and to track V
– 0.04 and a maximum value of MV
Symbol
DC value (that is, 15 mV).
C
C
DIO
DD
IO
MV
0.49 × V
at all times. The DRAM and memory controller can use the same or
REF
DDDDR
GND
25.9
Min
–50
V
+ 0.100
OUT
DDDDR
Symbol
I
DC variations as measured at the receiver. Peak-to-peak
MVREFn
Table
V
Min
DDDDR
6
9.
MV
0.51 × V
.
REF
REF
V
REF
–25.9
DDDDR
Max
Min
50
– 0.100
+ 0.04 V. V
DDDDR
Electrical Characteristics
Max
0.5
TT
8
1250
Max
Table 7
should track variations
Unit
mA
mA
μA
V
V
V
provides the
Notes
2,3,4
Unit
6, 7
6, 7
μA
5
5
8
Unit
pF
pF
55

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