AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 59

• Manufacturer Part Number: AX500-1BG896
• Description: Axcelerator Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Carry-Chain Logic
The Axcelerator dedicated carry-chain logic offers a very
compact solution for implementing arithmetic functions
without sacrificing performance.
To implement the carry-chain logic, two C-cells in a
Cluster are connected together so the FCO (i.e. carry out)
for the two bits is generated in a carry look-ahead
scheme to achieve minimum propagation delay from the
FCI (i.e. carry in) into the two-bit Cluster. The two-bit
carry logic is shown in
The FCI of one C-cell pair is driven by the FCO of the
C-cell pair immediately above it. Similarly, the FCO of one
Figure 2-29 • Axcelerator’s Two-Bit Carry Logic
0
1
0
1
Figure
0
1
2-29.
0
1
v2.7
C-cell pair, drives the FCI input of the C-cell pair
immediately below it
Figure 2-30 on page
The carry-chain logic is selected via the CFN input. When
carry logic is not required, this signal is deasserted to
save power. Again, this configuration is handled
automatically for the user through Actel's macro library.
The signal propagation delay between two C-cells in the
carry-chain sequence is 0.1 ns.
0
1
0
1
0
1
2-46).
(Figure 1-4 on page 1-3
Axcelerator Family FPGAs
0
1
0
1
DCOUT
and
2-45