ORT8850H AGERE [Agere Systems], ORT8850H Datasheet - Page 105

• Manufacturer Part Number: ORT8850H
• Description: Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
• Manufacturer: AGERE [Agere Systems]

Data Sheet
August 2001
Package Thermal Characteristics
Summary
There are three thermal parameters that are in com-
mon use:
the parameters are affected, to varying degrees, by
package design (including paddle size) and choice of
materials, the amount of copper in the test board or
system board, and system airflow.
This is the thermal resistance from junction to ambient
(theta-JA, R-theta, etc.).
where T
air temperature, and Q is the chip power.
Experimentally,
mal test die is assembled into the package of interest,
and the part is mounted on the thermal test board. The
diodes on the test chip are separately calibrated in an
oven. The package/board is placed either in a JEDEC
natural convection box or in the wind tunnel, the latter
for forced convection measurements. A controlled
amount of power (Q) is dissipated in the test chip’s
heater resistor, the chip’s temperature (T
mined by the forward drop on the diodes, and the ambi-
ent temperature (T
expressed in units of °C/watt.
This JEDEC designated parameter correlates the junc-
tion temperature to the case temperature. It is gener-
ally used to infer the junction temperature while the
device is operating in the system. It is not considered a
true thermal resistance, and it is defined by:
where T
T
During the
besides the other parameters measured, an additional
temperature reading, T
attached at top-dead-center of the case.
expressed in units of °C/W.
Agere Systems Inc.
J
JA
JC
is the junction temperature, and Q is the chip power.
J
C
is the junction temperature, T
is the case temperature at top dead center,
JA
JA
,
measurements described above,
JC, and
JA
A
JC
JA
) is noted. Note that
is determined when a special ther-
=
=
C
, is made with a thermocouple
JC
T
------------------- -
T
------------------- -
J
J
. It should be noted that all
Q
Q
–
–
T
T
C
A
A,
is the ambient
J
) is deter-
JA
JC
is
is also
Eight-Channel x 850 Mbits/s Backplane Transceiver
This is the thermal resistance from junction to case. It
is most often used when attaching a heat sink to the
top of the package. It is defined by:
The parameters in this equation have been defined
above. However, the measurements are performed
with the case of the part pressed against a water-
cooled heat sink to draw most of the heat generated by
the chip out the top of the package. It is this difference
in the measurement process that differentiates
from
expressed in units of °C/W.
This is the thermal resistance from junction to board
(
where T
lead measured with a thermocouple. The other param-
eters on the right-hand side have been defined above.
This is considered a true thermal resistance, and the
measurement is made with a water-cooled heat sink
pressed against the board to draw most of the heat out
of the leads. Note that
°C/W and that this parameter and the way it is mea-
sured are still in JEDEC committee.
FPSC Maximum Junction Temperature
Once the power dissipated by the FPSC has been
determined (see the Estimating Power Dissipation sec-
tion), the maximum junction temperature of the FPSC
can be found. This is needed to determine if speed der-
ating of the device from the 85 °C junction temperature
used in all of the delay tables is needed. Using the
maximum ambient temperature, T
dissipated by the device, Q (expressed in °C), the max-
imum junction temperature is approximated by:
T
Table 35 lists the thermal characteristics for all pack-
ages used with the ORCA ORT8850 Series of FPSCs.
Jmax =
JC
JB
JL
). It is defined by:
JC.
T
B
Amax
is the temperature of the board adjacent to a
JC
is a true thermal resistance and is
+ (Q •
JC
JB
JA
=
)
JB
=
T
------------------- -
ORCA ORT8850 FPSC
J
is expressed in units of
T
------------------- -
–
Q
J
T
Q
–
C
T
B
Amax
, and the power
JC
105