cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 169

• Manufacturer Part Number: cp3cn23
• Description: Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
• Manufacturer: National Semiconductor Corporation

24.0 Multi-Function Timer
The Multi-Function Timer module contains a pair of 16-bit
timer/counters. Each timer/counter unit offers a choice of
clock sources for operation and can be configured to oper-
ate in any of the following modes:
T Processor-Independent Pulse Width Modulation (PWM)
T Dual-Input Capture mode, which measures the elapsed
T Dual Independent Timer mode, which generates system
24.1.1
The Timer/Counter block contains the following functional
blocks:
T Two 16-bit counters, Timer/Counter 1 (TCNT1) and Tim-
T Two 16-bit reload/capture registers, TCRA and TCRB
T Control logic necessary to configure the timer to operate
T Interrupt control and I/O control logic
mode, which generates pulses of a specified width and
duty cycle, and which also provides a general-purpose
timer/counter.
time between occurrences of external events, and which
also provides a general-purpose timer/counter.
timing signals or counts occurrences of external events.
er/Counter 2 (TCNT2)
in any of the four operating modes
System
Timer/Counter Block
Reset
Clock
TB
Prescaler Register
Prescaler Counter
Synchr.
System
Clock
TPRSC
5-Bit
Clock Source
Figure 79. Multi-Function Timer Block Diagram
Figure 80. Multi-Function Timer Clock Source
External Event
No Clock
Prescaled Clock
Pulse Accumulator
External Event
Reload/Capture A
Reload/Capture B
Timer/Counter 1
Timer/Counter 2
Timer/Counter
PWM/Capture/Counter
Mode Select + Control
TCNT1
TCNT2
TCRA
TCRB
169
T Single-Input Capture and Single Timer mode, which pro-
The timer unit uses two I/O pins, called TA and TB. The tim-
er I/O pins are alternate functions of the PG7 and PE4 port
pins, respectively.
24.1
Figure 79 is a block diagram showing the internal structure
of the MFT. There are two main functional blocks: a Timer/
Counter and Action block and a Clock Source block. The
Timer/Counter and Action block contains two separate tim-
er/counter units, called Timer/Counter 1 and Timer/Counter
2.
In a power-saving mode that uses the low-frequency
(32.768 kHz) clock as the System Clock, the synchroniza-
tion circuit requires that the Slow Clock operate at no more
than one-fourth the speed of the 32.768 kHz System Clock.
24.1.2
The Clock Source block generates the signals used to clock
the two timer/counter registers. The internal structure of the
Clock Source block is shown in Figure 80.
vides one external event counter and one system timer.
Action
TIMER STRUCTURE
Clock Source Block
Interrupt A
Interrupt B
Counter 1
Counter 2
Select
Select
DS081
Clock
Clock
TA
TB
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Counter 1
Clock
Counter 2
Clock
DS082