cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 147

• Manufacturer Part Number: cp3cn23
• Description: Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
• Manufacturer: National Semiconductor Corporation

115200
128000
230400
345600
460800
576000
115200
128000
230400
14400
19200
38400
56000
14400
19200
38400
56000
Baud
Baud
Rate
1200
1800
2000
2400
3600
4800
7200
9600
Rate
1200
1800
2000
2400
3600
4800
7200
9600
300
600
300
600
12
12
16
11
11
11
11
14
15
16
13
10
10
15
16
16
10
11
15
10
14
10
16
13
13
13
16
13
O
O
7
8
7
9
7
7
7
8
9
SYS_CLK = 8 MHz
SYS_CLK = 3 MHz
1111
401
101
101
250
303
202
101
101
250
125
250
101
100
125
17
37
17
13
11
17
25
17
13
16
13
N
N
7
7
1
1
1
2
6
6
2
1
1
9.5
1.0
5.5
5.5
1.0
1.0
1.0
1.5
1.0
3.5
1.0
3.5
1.0
1.0
1.0
1.0
3.5
1.5
2.5
1.0
2.5
2.5
1.0
1.5
1.0
1.0
3.5
2.5
3.5
1.5
1.0
1.5
1.0
1.0
1.0
1.5
1.0
P
P
%err
%err
0.00
0.01
0.01
0.01
0.00
0.01
0.01
0.01
0.01
0.04
0.10
0.04
0.16
0.10
0.79
0.79
0.79
2.88
0.79
0.79
0.00
0.00
0.00
0.01
0.00
0.00
0.04
0.00
0.04
0.16
0.16
0.16
0.16
0.79
0.16
2.34
0.16
Table 62 Baud Rate Programming
16
16
16
11
16
10
11
10
14
10
16
13
16
13
13
12
11
11
11
16
14
15
16
16
O
O
7
8
9
7
7
7
9
9
8
9
7
8
SYS_CLK = 6 MHz
SYS_CLK = 2 MHz
1250
625
125
303
125
250
101
125
101
202
101
101
17
25
17
13
13
12
25
17
37
17
31
13
N
N
4
3
2
1
1
1
1
1
1
4
1
2
15.5 0.44
1.0
1.0
2.5
1.0
1.5
1.0
1.5
1.0
3.5
2.5
3.5
1.5
1.5
1.0
1.0
1.0
1.0
2.5
1.0
1.5
5.5
1.5
1.5
1.0
2.5
3.5
1.0
3.5
1.0
1.0
6.5
6.5
1.0
2.5
1.0
P
P
147
%err
%err
0.00
0.00
0.00
0.01
0.00
0.00
0.01
0.00
0.04
0.00
0.04
0.16
0.16
0.79
0.16
2.34
0.16
0.79
0.16
0.79
0.01
0.01
0.01
0.01
0.00
0.04
0.10
0.04
0.44
0.16
0.16
0.16
0.79
0.79
2.34
11
11
10
11
10
10
14
16
13
15
11
13
11
11
11
14
15
10
16
16
10
13
O
O
7
7
7
8
7
9
9
8
9
SYS_CLK = 5 MHz
SYS_CLK = 1 MHz
202
101
119
101
250
119
139
149
202
101
33
17
31
33
13
13
10
17
37
50
13
N
N
6
4
3
2
1
1
7
1
2
2
15.5 0.44
7.5
7.5
3.5
2.5
1.0
2.5
1.0
1.0
1.5
2.5
1.5
2.5
1.0
1.0
1.0
1.0
1.0
1.5
1.5
3.5
1.0
1.0
3.5
1.0
1.0
6.5
1.0
6.5
1.0
1.0
P
P
%err
%err
0.01
0.01
0.04
0.01
0.00
0.04
0.08
0.13
0.21
0.16
0.21
0.16
0.16
0.79
1.36
0.16
1.36
0.01
0.01
0.04
0.10
0.00
0.04
0.44
0.16
0.16
0.79
0.16
0.16
0.79
12
12
11
11
16
11
11
14
15
16
16
13
10
11
14
10
16
16
10
10
13
13
O
O
9
7
SYS_CLK = 500 kHz
9
7
9
7
9
8
SYS_CLK = 4 MHz
202
101
202
202
125
101
101
101
17
37
17
31
13
17
17
31
25
13
N
N
1
1
1
1
1
1
1
7
1
1
2
1
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15.5 0.44
5.5
5.5
1.5
1.0
1.0
1.5
1.0
3.5
1.0
3.5
1.0
1.0
6.5
5.5
3.5
3.5
2.5
1.5
3.5
3.5
1.0
1.0
1.0
6.5
1.0
6.5
3.5
1.0
1.0
P
P
%err
%err
0.01
0.01
0.01
0.01
0.00
0.01
0.01
0.04
0.10
0.04
0.44
0.16
0.16
0.10
0.79
0.79
0.79
0.01
0.04
0.04
0.44
0.00
0.16
0.16
0.79
0.16
0.79
0.16
0.16