stlc5464 STMicroelectronics, stlc5464 Datasheet - Page 68

• Manufacturer Part Number: stlc5464
• Description: Multi-hdlcwith Switching Matrix Associated
• Manufacturer: STMicroelectronics

STLC5464
VIII - INTERNAL REGISTERS (continued)
VIII.22 - Transmit Command / Indicate Register - TCIR (2A)H
When this register is written by the microprocessor, these different bits mean :
READ : READ C/I MEMORY
CA 0/2 : TRANSMIT COMMAND/INDICATE MEMORY ADDRESS
G0
C6/1
The New Primitive is taken into account by the transmitter after writing bits 8 to 15 (if 8 bit microprocessor).
Transmit Command/Indicate Register (after reading)
When this register is read by the microprocessor, these different bits mean :
READ : READ C/I MEMORY
CA 0/2 : TRANSMIT C/I ADDRESS
G0
C6/1
PT0/1 : Status bits
68/83
bit15
bit15
0
0
G0
: This bit defines one of two GCI multiplexes.
: New Primitive to be transmitted
G0
: This bit defines one of two GCI multiplexes.
: Last Primitive transmitted.
READ = 1, READ C/I MEMORY.
READ = 0, WRITE C/I MEMORY.
CA 0/2 : These bits define one of eight Command/Indicate Channels.
G0 = 0, TDM4 is selected.
G0 = 1, TDM5 is selected.
C6 is transmitted first if ANA = 1.
C4 is transmitted first if ANA = 0.
READ = 1, READ C/I MEMORY.
READ = 0, WRITE C/I MEMORY.
CA 0/2 : These bits define one of eight Command/Indicate Channels.
G0 = 0, TDM4 is selected.
G0 = 1, TDM5 is selected.
P1
0
0
1
1
CA2
CA2
CA1
CA1
P0
0
1
0
1
CA0
CA0
Primitive has not been transmitted yet.
Primitive has been transmitted once.
Primitive has been transmitted twice.
Primitive has been transmitted three times or more.
READ
READ
Nu
0
After reset (00FF)
bit8
bit8
Nu
0
PT1
bit7
bit7
Nu
Primitive Status
H
PT0
Nu
C6
C6
C5
C5
C4
C4
C3
C3
C2
C2
bit 0
bit 0
C1
C1