ds3102 Maxim Integrated Products, Inc., ds3102 Datasheet - Page 82

• Manufacturer Part Number: ds3102
• Description: Stratum 3 Timing Card Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
For rev A2 devices, in LVPECL mode the differential output voltage is higher than the max V
Table 10-6
V
register. If differential voltages larger than V
Procedure to configure an output for LVPECL mode:
Procedure to configure an output for LVDS mode:
Bits 7 and 6: Output Clock 5 Signal Format (OC5SF[1:0]). The adjustment register for OC5 is 01D4h. See
Section 7.8.1.
Bits 5 and 4: Output Clock 4 Signal Format (OC4SF[1:0]). The adjustment register for OC4 is 01D0h. See
Section 7.8.1.
Bits 3 and 2: Output Clock 7 Signal Format (OC7SF[1:0]). The adjustment register for OC7 is 01DCh. See
Section 7.8.1.
Bits 1 and 0: Output Clock 6 Signal Format (OC6SF[1:0]). The adjustment register for OC6 is 01D8h. See
Section 7.8.1.
Rev: 012108
____________________________________________________________________________________________ DS3102
ODPECL,MAX
1) Set the OCxSF[1:0] field to 01b.
2) Write 01h to address 01FFh.
3) Write 55h to the adjustment register (see below for address).
4) Write 00h to address 01FFh.
1) Set the OCxSF[1:0] field to 10b.
2) Write 01h to address 01FFh.
3) Write 00h to the adjustment register (see below for address).
4) Write 00h to address 01FFh.
00 = Output disabled (powered down)
01 = 3V LVPECL level compatible
10 = 3V LVDS compatible (default)
11 = 3V LVDS compatible
00 = Output disabled (powered down)
01 = 3V LVPECL level compatible
10 = 3V LVDS compatible (default)
11 = 3V LVDS compatible
00 = Output disabled (powered down)
01 = 3V LVPECL level compatible
10 = 3V LVDS compatible (default)
11 = 3V LVDS compatible
00 = Output disabled (powered down)
01 = 3V LVPECL level compatible
10 = 3V LVDS compatible (default)
11 = 3V LVDS compatible
are unacceptable, the following procedures must be followed when writing the OCxSF fields in this
unless an adjustment register is written with the proper value. If differential voltages larger than
7
1
OC5SF[1:0]
6
0
MCR8
Master Configuration Register 8
3Ah
5
1
ODPECL,MAX
OC4SF[1:0]
are acceptable, only the OCxSF field must be written.
4
0
1
3
OC7SF[1:0]
2
0
1
1
OC6SF[1:0]
ODPECL
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spec in
0
0