MPC603RRX266TC Freescale Semiconductor, MPC603RRX266TC Datasheet - Page 25

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MPC603RRX266TC

Manufacturer Part Number
MPC603RRX266TC
Description
IC MPU 32BIT 266MHZ 255-CBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC603RRX266TC

Processor Type
MPC603e PowerPC 32-Bit
Speed
266MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
255-CBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC603RRX266TC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor, Inc.
System Design Information
1.8.5 Pull-up Resistor Requirements
The 603e requires high-resistive (weak: 10 KW) pull-up resistors on several control signals of the bus
interface to maintain the control signals in the negated state after they have been actively negated and
released by the 603e or other bus master. These signals areÑTS, ABB, DBB, and ARTRY.
In addition, the 603e has three open-drain style outputs that require pull-up resistors (weak or stronger:
4.7 KWÐ10 KW) if they are used by the system. These signals areÑAPE, DPE, and CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes on the bus are not driven by any master
and may ßoat in the high-impedance state for relatively long periods of time. Since the 603e must
continually monitor these signals for snooping, this ßoat condition may cause excessive power draw by the
input receivers on the 603e. It is recommended that these signals be pulled up through weak (10 KW) pull-up
resistors or restored in some manner by the system. The snooped address and transfer attribute inputs
areÑA[0Ð31], AP[0Ð3], TT[0Ð4], TBST, and GBL.
The data bus input receivers are normally turned off when no read operation is in progress and do not require
pull-up resistors on the data bus.
1.8.6 Thermal Management Information
This section provides thermal management information for the CBGA and PBGA packages for air-cooled
applications. Proper thermal control design is primarily dependent upon the system-level designÑthe heat
sink, airßow and thermal interface material.
Figure 14 shows the upper and lower limits of the die junction-to-ambient thermal resistance for both
package styles. The lower limit is shown for the case of a densely populated printed-circuit board with high
thermal loading of adjacent and neighboring components.
PID7t-603e Hardware Specifications
25
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