GCIXP1250BC 837414 Intel, GCIXP1250BC 837414 Datasheet - Page 32

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GCIXP1250BC 837414

Manufacturer Part Number
GCIXP1250BC 837414
Description
Manufacturer
Intel
Datasheet

Specifications of GCIXP1250BC 837414

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel
32
Table 14. SDRAM Interface Pins (Continued)
®
IXP1250 Network Processor
MDATA_ECC
[7:0]
RAS_L
CAS_L
WE_L
DQM
SDCLK
Totals:
Signal Names
Interface
SDRAM
[25]
[24]
[23]
[22]
[21]
[20]
[19]
[18]
[17]
[16]
[15]
[14]
[13]
[12]
[10]
[11]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
L2
L3
L4
K2
K3
K5
J2
J3
J4
H1
J5
H2
H3
H4
G1
H5
G2
G3
G4
F2
G5
F3
E1
F4
E2
F5
V2
V1
U5
U4
U3
U2
R1
R2
W3
W2
W1
Number
W4
AD1
Pin
O4
O4
O4
O4
O3
Type
I1/O1 8
1
1
1
1
1
92
Total
64 Bidirectional data signals.
Row Address Select output.
Precharge cycle indicated if asserted with WE_L.
Column Address Select output.
Write Enable output.
SDRAM data control output. SDRAMs use this signal to
enable their data buffers to drive MDATA[63:0] on reads, or
enable the SDRAM to accept input data from MDATA[63:0]
for writes.
SDRAM Clock output. Frequency is one half the speed of
the Core clock (½ * F
Pin Descriptions
core
).
Datasheet

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