QG80333M500 S L9BH Intel, QG80333M500 S L9BH Datasheet - Page 30

• Manufacturer Part Number: QG80333M500 S L9BH
• Manufacturer: Intel

Specifications of QG80333M500 S L9BH

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Intel® 80333 I/O Processor
Core Errata
7.
Problem:
Workaround:
Status:
8.
Problem:
Workaround:
Status:
30
Updating the JTAG parallel registers requires an extra TCK rising edge
The IEEE 1149.1 specification states that the effects of updating all parallel JTAG registers are
expected to be seen on the falling edge of TCK in the Update-DR state. The Intel XScale
processor parallel JTAG registers incorrectly require an extra TCK rising edge to make the update
visible. Therefore, operations like hold-reset, JTAG break, and vector traps require either an extra
TCK cycle by going to Run-Test-Idle or by cycling through the state machine again in order to
trigger the expected hardware behavior.
When the JTAG interface is polled continuously, this erratum has no effect. When not, an extra
TCK cycle can be caused by going to Run-Test-Idle after writing a parallel JTAG register.
No
Non-branch instruction in vector table might execute twice after a thumb
mode exception
When an exception occurs in thumb mode and a non-branch instruction is executed at the
corresponding exception vector, that instruction might execute twice. Typically instructions located
at exception vectors must be branch instructions which go to the appropriate handler, but the ARM
architecture
(0x0000001c/0xffff001c) without requiring a branch. Because of this bug, the first instruction of
such an FIQ handler might be executed twice when it is not a branch instruction.
When a “NOP” is placed at the beginning of the FIQ handler, the “NOP” executes twice and no
incorrect behavior results. When a branch instruction is placed at the beginning of the handler, it is
not executed twice.
No
Fix. See the
Fix. See the
allows
Table , “Summary Table of Changes” on page
Table , “Summary Table of Changes” on page
the
FIQ
handler
to
be
placed
7.
7.
directly
at
Specification Update
the
FIQ
vector
®