MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 32

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Chapter 2 Pins and Connections
2.3.6
Table 2-2
common pin interfaces are hardwired to internal circuits.
32
PTA0/KBI1P0
PTA1/KBI1P1
PTA2/KBI1P2
PTA3/KBI1P3
PTA4/KBI1P4
PTA5/KBI1P5
PTA6/KBI1P6
PTA7/KBI1P7
PTB0/AD1P0
PTB1/AD1P1
PTB2/AD1P2
PTB3/AD1P3
PTB4/AD1P4
PTB5/AD1P5
PTB6/AD1P6
PTB7/AD1P7
PTC1/RxD2
PTC2/SDA1
PTC3/SCL1
PTC0/TxD2
RESET
V
V
V
Name
V
PTC4
PTC5
PTC6
V
IRQ
V
Pin
DDAD
SSAD
REFH
REFL
DD
SS
summarizes I/O pin characteristics. These characteristics are determined by the way the
Signal Properties Summary
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
High Current
Pin
—
—
—
—
—
—
—
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
MC9S08GB60A Data Sheet, Rev. 2
Table 2-2. Signal Properties
Output
Slew
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
—
—
—
—
—
—
—
N
1
Pull-Up
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
—
—
—
—
—
—
Y
Y
2
The 48-pin QFN package has two V
and V
Pin contains integrated pullup.
IRQPE must be set to enable IRQ function.
IRQ does not have a clamp diode to V
not be driven above V
Pullup/pulldown active when IRQ pin function
enabled. Pullup forced on when IRQ enabled for
falling edges; pulldown forced on when IRQ enabled
for rising edges.
Pullup/pulldown active when KBI pin function
enabled. Pullup forced on when KBI1Px enabled for
falling edges; pulldown forced on when KBI1Px
enabled for rising edges.
When pin is configured for SCI function, pin is
configured for partial output drive.
Not available on 42-pin package
Not available on 42-pin package
SS2
.
Comments
DD
.
Freescale Semiconductor
SS
DD
pins — V
. IRQ should
SS1