MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 115

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

7.3.9
The ICG provides a fixed frequency clock output, XCLK, for use by on-chip peripherals. This output is
equal to the internal bus clock, BUSCLK, in FBE mode. In FEE mode, XCLK is equal to ICGERCLK ÷ 2
when the following conditions are met:
If the above conditions are not true, then XCLK is equal to BUSCLK.
When the ICG is in either FEI or SCM mode, XCLK is turned off. Any peripherals which can use XCLK
as a clock source must not do so when the ICG is in FEI or SCM mode.
7.3.10
The oscillator has the option of running in a high gain oscillator (HGO) mode, which improves the
oscillator's resistance to EMC noise when running in FBE or FEE modes. This option is selected by writing
a 1 to the HGO bit in the ICGC1 register. HGO is used with both the high and low range oscillators but is
only valid when REFS = 1 in the ICGC1 register. When HGO = 0, the standard low-power oscillator is
selected.
If the high gain option is to be switched after the initial write to the ICGC1 register, then the ICG should
first be changed to SCM or FEI mode to stop the external oscillator. Then the HGO bit can be modified
and FEE or FBE mode can be re-selected in the same write to ICGC1. The oscillator will go through the
standard start-up delay before the ICG switches to the external oscillator
7.4
7.4.1
This section is intended to give some basic direction on which configuration a user would want to select
when initializing the ICG. For some applications, the serial communication link may dictate the accuracy
of the clock reference. For other applications, lowest power consumption may be the chief clock
consideration. Still others may have lowest cost as the primary goal. The ICG allows great flexibility in
choosing which is best for any application.
Freescale Semiconductor
•
•
(P × N) ÷ R ≥ 4 where P is determined by RANGE (see
MFD and RFD, respectively (see
LOCK = 1.
Initialization/Application Information
Fixed Frequency Clock
High Gain Oscillator
Introduction
MC9S08GB60A Data Sheet, Rev. 2
Table
7-5).
Table
7-4), N and R are determined by
Internal Clock Generator (S08ICGV2)
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