MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 238

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Analog-to-Digital Converter (S08ATDV3)
For right-justified mode, result data bits 9 and 8 map onto bits 1 and 0 of ATD1RH, result data bits 7–0
map onto ATD1RL bits 7–0, where bit 1 of ATD1RH is the most significant bit (MSB).
The ATD 10-bit conversion results are stored in two 8-bit result registers, ATD1RH and ATD1RL. The
result data is formatted either left or right justified where the format is selected using the DJM control bit
in the ATD1C register. The 10-bit result data is mapped either between ATD1RH bits 7–0 and ATD1RL
bits 7–6 (left justified), or ATD1RH bits 1–0 and ATD1RL bits 7–0 (right justified).
For 8-bit conversions, the 8-bit result is always located in ATD1RH bits 7–0, and the ATD1RL bits read
0. For 10-bit conversions, the six unused bits always read 0.
The ATD1RH and ATD1RL registers are read-only.
14.6.4
The ATD pin enable register allows the pins dedicated to the ATD module to be configured for ATD usage.
A write to this register will abort the current conversion but will not initiate a new conversion. If the
ATDPEx bit is 0 (disabled for ATD usage) but the corresponding analog input channel is selected via the
ATDCH bits, the ATD will not convert the analog input but will instead convert V
the ATD result registers.
238
ATDPE[7:0]
Reset
ATD1RH
ATD1RH
Field
7
9
7
7
W
R
ATDPE7
ATD Pin Enable (ATD1PE)
6
6
ATD Pin 7–0 Enables
0 Pin disabled for ATD usage.
1 Pin enabled for ATD usage.
0
7
5
5
ATDPE6
4
4
0
6
Figure 14-9. ATD Pin Enable Register (ATD1PE)
3
3
RESULT
Table 14-8. ATD1PE Field Descriptions
ATDPE5
2
2
Figure 14-8. Right-Justified Mode
Figure 14-7. Left-Justified Mode
MC9S08GB60A Data Sheet, Rev. 2
0
5
1
1
9
ATDPE4
0
0
0
4
Description
ATD1RL
ATD1RL
7
7
ATDPE3
3
0
6
0
6
RESULT
5
5
ATDPE2
4
4
0
2
3
3
REFL
ATDPE1
Freescale Semiconductor
2
2
0
1
placing zeroes in
1
1
ATDPE0
0
0
0
0
0