MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 105

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

7.1
Figure 7-3
(ICG) module. This section includes a general description and a feature list.
The ICG provides multiple options for clock sources. This offers a user great flexibility when making
choices between cost, precision, current draw, and performance. As seen in
of four functional blocks. Each of these is briefly described here and then in more detail in a later section.
Freescale Semiconductor
•
•
•
Oscillator block — The oscillator block provides means for connecting an external crystal or
resonator. Two frequency ranges are software selectable to allow optimal startup and stability.
Alternatively, the oscillator block can be used to route an external square wave to the system clock.
External sources can provide a very precise clock source. The oscillator is capable of being
configured for low power mode or high amplitude mode as selected by HGO.
Internal reference generator — The internal reference generator consists of two controlled clock
sources. One is designed to be approximately 8 MHz and can be selected as a local clock for the
background debug controller. The other internal reference clock source is typically 243 kHz and
can be trimmed for finer accuracy via software when a precise timed event is input to the MCU.
This provides a highly reliable, low-cost clock source.
Frequency-locked loop — A frequency-locked loop (FLL) stage takes either the internal or
external clock source and multiplies it to a higher frequency. Status bits provide information when
the circuit has achieved lock and when it falls out of lock. Additionally, this block can monitor the
external reference clock and signals whether the clock is valid or not.
Introduction
(SEE NOTE 2)
(SEE NOTE 2)
is a top-level diagram that shows the functional organization of the internal clock generation
V
V
DDA
SSA
EXTAL
XTAL
NOTES:
1. See
2. Not all HCS08 microcontrollers have unique supply pins for the ICG. See the device pin assignments in
INTERNAL
REFERENCE
GENERATORS
Chapter 2, “Pins and Connections
WITH EXTERNAL REF
OSCILLATOR (OSC)
Table 7-1
SELECT
TYP 243 kHz
for specific use of ICGOUT, FFE, ICGLCLK, ICGERCLK
IRG
8 MHz
RG
MC9S08GB60A Data Sheet, Rev. 2
Figure 7-3. ICG Block Diagram
SELECT
REF
ICGERCLK
ICGIRCLK
LOCAL CLOCK FOR OPTIONAL USE WITH BDC
AND CLOCK DETECTOR
for specifics.
FREQUENCY
LOOP (FLL)
LOCKED
LOSS OF LOCK
ICG
DCO
ICGDCLK
OUTPUT
SELECT
CLOCK
SELECT
CLOCK
SELECT
CLOCK
FIXED
Figure
Internal Clock Generator (S08ICGV2)
7-3, the ICG consists
ICGLCLK
FFE
/R
ICGOUT
105