RG82845G S L66F Intel, RG82845G S L66F Datasheet - Page 98

• Manufacturer Part Number: RG82845G S L66F
• Manufacturer: Intel

Specifications of RG82845G S L66F

• Lead Free Status / RoHS Status: Not Compliant

Register Description
3.5.3.11
3.5.3.12
3.5.3.13
98
MMADR—Memory Mapped Range Address Register (Device 2)
Address Offset:
Default Value:
Access:
Size:
This register requests allocation for the IGD registers and instruction ports. The allocation is for
512 KB and the base address is defined by bits [31:19].
SVID2—Subsystem Vendor Identification Register (Device 2)
Address Offset:
Default Value:
Access:
Size:
SID2—Subsystem Identification Register (Device 2)
Address Offset:
Default Value:
Access:
Size:
31:19
18:4
15:0
15:0
Bit
2:1
Bit
Bit
3
0
Memory Base Address— R/W. Set by the operating system. These bits correspond to address
signals [31:19].
Address Mask— RO. Hardwired to zeros to indicate 512-KB address range.
Prefetchable Memory— RO. Hardwired to 0 to prevent prefetching.
Memory Type— RO. Hardwired to zeros to indicate 32-bit address.
Memory / IO Space— RO. Hardwired to 0 to indicate memory space.
Subsystem Vendor ID. This value is used to identify the vendor of the subsystem. This register
should be programmed by BIOS during boot-up. Once written, this register becomes read only. This
register can only be cleared by a Reset.
Subsystem Identification. This value is used to identify a particular subsystem. This field should be
programmed by BIOS during boot-up. Once written, this register becomes read only. This register
can only be cleared by a Reset.
14–
00000000h
R/W, RO
32 bits
2C–
0000h
R/WO
16 bits
2E–
0000h
R/WO
16 bits
17h
2Fh
2Dh
Intel
Description
Description
Description
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82845G/82845GL/82845GV GMCH Datasheet