RG82845G S L66F Intel, RG82845G S L66F Datasheet - Page 115
RG82845G S L66F
Manufacturer Part Number
RG82845G S L66F
Description
Manufacturer
Intel
Datasheet
1.RG82845G_S_L66F.pdf
(193 pages)
Specifications of RG82845G S L66F
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4.3.2
4.3.2.1
Intel
®
Table 4-7. PCI Commands Supported by GMCH When Acting As a PCI Target
82845G/82845GL/82845GV GMCH Datasheet
PCI Semantic Transactions on AGP
The GMCH accepts and generates PCI semantic transactions on the AGP bus. The GMCH
guarantees that PCI semantic accesses to SDRAM are kept coherent with the processor caches by
generating snoops to the processor bus.
GMCH Initiator and Target PCI Operations
Table 4-7
The cycles can be either destined to main memory or the hub interface bus.
NOTE: N/A refers to a function that is not applicable
As a target of an AGP/PCI cycle, the GMCH only supports the following transactions:
Memory Read:
a memory read bursts across the cache line, another snoop is issued but the transaction will be
disconnected on the cache line boundary. Subsequent memory read transaction hitting the cache
line buffer return data from the buffer.
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read Multiple
Dual Address Cycle
Memory Read Line
Memory Write and Invalidate
PCI Command
summarizes PCI target operation support of the GMCH for AGP/PCI_B bus initiators.
The GMCH issues one snoop and the entire cache line of read data is buffered. If
GC/BE[3:0]# Encoding
0000
0001
0010
0011
0100
0101
0110
0110
1000
1001
1010
1011
1100
1100
1101
0111
0111
1110
1110
1111
1111
Cycle Destination
Main Memory
Hub Interface
Main Memory
Hub Interface
Main Memory
Hub Interface
Main Memory
Hub Interface
Main Memory
Hub Interface
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
GMCH
Functional Description
Response As PCI
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
No Response
Posts Data
Posts Data
Target
Read
Read
Read
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