RG82845G S L66F Intel, RG82845G S L66F Datasheet - Page 184

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RG82845G S L66F

Manufacturer Part Number
RG82845G S L66F
Description
Manufacturer
Intel
Datasheet

Specifications of RG82845G S L66F

Lead Free Status / RoHS Status
Not Compliant
Intel
9.4.1.2
184
®
82845GL/82845GV GMCH
ATTBASE
Address Offset
Size:
AMTT
Address Offset
Size:
LPTT
Address Offset
Size:
Device 0 Register Bit Differences
The registers described in this section are in both the 82845G and 82845GL/82845GV. However,
some of the register bits have different functions/operations between the components. Only the bits
that are different are shown in this section. Thus, the bit descriptions shown in this section only
apply to the 82845GL or 82845GV. The remaining register bits are the same for all three
components and are described in
GC—Graphics Control Register (Device 0)
Address Offset
Default Value
Access
Size:
Bits
3
AGP Low Priority Transaction Timer Register (Device 0)
AGP MTT Control Register (Device 0)
Integrated Graphics Disable (IGDIS). The GMCH’s Device 1 is disabled such that all
configuration cycles to Device 1 flow through to the hub interface. Also, the Next_Pointer field in
the CAPREG register (Device 0, Offset E4h) is RO at 00h. This enables internal graphics
capability.
0 = Enable. Internal Graphics is enabled (default)
Aperture Translation Table Register (Device 0)
B8–BBh
32 bits
BC–BFh
8 bits
BDh
8 bits
Chapter
52h
0000_0000b
RO
8 bits
3.
Intel
Description
®
82845G/82845GL/82845GV GMCH Datasheet

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