RG82845G S L66F Intel, RG82845G S L66F Datasheet - Page 154

• Manufacturer Part Number: RG82845G S L66F
• Manufacturer: Intel

Specifications of RG82845G S L66F

• Lead Free Status / RoHS Status: Not Compliant

Electrical Characteristics
6.6.2
6.6.3
154
Table 6-8. DAC Reference and Output Specifications
Table 6-9. DAC AC Characteristics
DAC Reference and Output Specifications
NOTES:
DAC AC Characteristics
NOTES:
1. VESA Video Signal Standard
2. Complement DAC channel output termination resistors are only required for differential video routing to the
3. Video filter capacitors and ferrite bead arranged in a PI configuration (one PI filter for RED, GREEN, BLUE
1. Measured at each RED, GREEN, BLUE termination according to the VESA Test Procedure – Evaluation of
2. R,G,B Max Video Rise/Fall Time: 50% of minimum pixel clock period
3. R,G,B Min Video Rise/Fall Time: 20% of minimum pixel clock period
4. Max settling time: 30% of minimum pixel clock period
5. Video channel-channel output skew: 25% of minimum pixel clock period
6. Overshoot/undershoot: ± 12% of black-white video level (full-scale) step function
7. Noise injection ratio: 0.5% of maximum luminance voltage (dc to max. pixel frequency)
Reference resistor
RED, GREEN, BLUE
termination resistor
RED#,GREEN#,BLUE#
termination resistor
Video Filter Ferrite Bead
Video Filter Capacitors
Pixel Clock Frequency
RED, GREEN, BLUE Video
Rise Time
RED, GREEN, BLUE Video
Fall Time
Settling Time
Video channel-to-channel
output skew
Overshoot/ Undershoot
Noise Injection Ratio
VGA connector.
outputs)
Analog Display Graphics Subsystems Proposal (Version 1, Draft 4, December 1, 2000)
Parameter
Parameter
-0.084
0.57
0.57
Min
Min
Typical
Typical
37.5
137
3.3
75
75
Intel
+0.084
Max
0.714
Max
1.43
1.43
0.86
®
350
0.5
82845G/82845GL/82845GV GMCH Datasheet
Units
Units
MHz
pF
Ω
Ω
Ω
Ω
ns
ns
ns
ns
%
V
Notes 1, 2, (10–90% of black-to-
white transition, at 350 MHz pixel
clock)
Notes 1, 3, (90–10% of white-to-
black transition, at 350 MHz pixel
clock)
Notes 1, 4, at 350 MHz pixel clock
Notes 1, 5, at 350 MHz pixel clock
Notes 1, 6, Full-scale voltage step
of 0.7 V
Notes 1, 7
1% tolerance, 1/16 W
Note 1, 1% tolerance, 1/16 W
Note 2, 1% tolerance, 1/16 W
(applies to differential routing)
Note 3, @ 100 MHz, (each RED,
GREEN, BLUE output)
Note 3, two capacitors per RED,
GREEN, BLUE output
Notes
Notes