LPC47M142-NC Standard Microsystems (SMSC), LPC47M142-NC Datasheet - Page 98

• Manufacturer Part Number: LPC47M142-NC
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M142-NC

• Lead Free Status / RoHS Status: Not Compliant

6.11 SERIAL IRQ
The LPC47M14x supports the serial interrupt to transmit interrupt information to the host system. The serial interrupt
scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0.
Timing Diagrams For SER_IRQ Cycle
A) Start Frame timing with source sampled a low pulse on IRQ1
Note:
Note 1: Start Frame pulse can be 4-8 clocks wide depending on the location of the device in the PCI bridge
B) Stop Frame Timing with Host using 17 SER_IRQ sampling period
Note:
Note 1: The next SER_IRQ cycle’s Start Frame pulse may or may not start immediately after the turn-around clock
Note 2: There may be none, one or more Idle states during the Stop Frame.
Note 3: Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
SMSC DS – LPC47M14X
PCI_CLK
SER_IRQ
PCI_CLK
SER_IRQ
Drive Source
H=Host Control; R=Recovery; T=Turn-Around; SL=Slave Control; S=Sample
hierarchy in a synchronous bridge design.
H=Host Control; R=Recovery; T=Turn-Around; S=Sample; I=Idle
of the Stop Frame.
Driver
S
FRAME
None
IRQ14
R
IRQ1
SL
or
H
T
START
S
Host Controller
START FRAME
IRQ15
H
IRQ15
FRAME
R
1
T
R
S
IOCHCK#
None
FRAME
Page 98
T
R
IRQ0 FRAME IRQ1 FRAME
S
T
None
I
R
2
STOP FRAME
Host Controller
T
STOP
H
S
IRQ1
1
R
R
T
T
NEXT CYCLE
IRQ2 FRAME
S
None
START
R
Rev. 03/19/2001
T
3