LPC47M142-NC Standard Microsystems (SMSC), LPC47M142-NC Datasheet - Page 63

• Manufacturer Part Number: LPC47M142-NC
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M142-NC

• Lead Free Status / RoHS Status: Not Compliant

LINE CONTROL REGISTER (LCR)
Address Offset = 3H, DLAB = 0, READ/WRITE
This register contains the format information of the serial line. The bit definitions are:
Bits 0 and 1
These two bits specify the number of bits in each transmitted or received serial character. The encoding of bits 0 and 1
is as follows:
The Start, Stop and Parity bits are not included in the word length.
SMSC DS – LPC47M14X
MODE
ONLY
BIT 3
FIFO
0
0
0
1
0
0
BIT 2
IDENTIFICATION
0
1
1
1
0
0
INTERRUPT
REGISTER
BIT 1
0
1
0
0
1
0
Start LSB Data 5-8 bits MSB Parity
BIT 0
1
0
0
0
0
0
PRIORITY
BIT 1
0
0
1
1
Highest
Second
Second
LEVEL
Fourth
Third
-
BIT 0 WORD LENGTH
0
1
0
1
Serial Data
INTERRUPT SET AND RESET FUNCTIONS
Register Empty
Received Data
Receiver Line
INTERRUPT
Page 63
Transmitter
Character
Indication
Available
MODEM
Timeout
Holding
5 Bits
6 Bits
7 Bits
8 Bits
Status
Status
TYPE
None
Input to the RCVR
Data Set Ready or
Removed From or
last 4 Char times
Holding Register
Framing Error or
Clear to Send or
Ring Indicator or
FIFO during the
least 1 char in it
during this time
Break Interrupt
Overrun Error,
No Characters
Receiver Data
and there is at
INTERRUPT
Data Carrier
Parity Error,
Have Been
Transmitter
SOURCE
Available
Empty
Detect
Stop
None
Register (if Source
Buffer or the FIFO
Reading the Line
Holding Register
drops below the
Receiver Buffer
Reading the IIR
MODEM Status
Status Register
Read Receiver
of Interrupt) or
INTERRUPT
trigger level.
Reading the
Reading the
Transmitter
CONTROL
Writing the
Register
Register
RESET
-
Rev. 05/02/2000