EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 847

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
RCLK output adder
RCLK PLL output adder
3.3-V LVTTL
3.3-V
LVCMOS
3.0-V LVTTL
3.0-V
LVCMOS
Table 1–134. EP3SE110 Row Pin Delay Adders for Regional Clock
Table 1–135. EP3SE260 Column Pins Input Timing Parameters (Part 1 of 4)
I/O Standard
Parameter
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
Industrial Commercial V
Parameter
—
—
EP3SE260 I/O Timing Parameters.
Table 1–135
parameters for EP3SE260 devices for single-ended I/O standards.
Table 1–135
for single-ended I/O standards.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SU
SU
SU
SU
SU
SU
SU
SU
H
H
H
H
H
H
H
H
Fast Model
Industrial Commercial
-0.055
-0.017
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
through
specifies EP3SE260 Column Pins Input Timing parameters
Stratix III Device Datasheet: DC and Switching Characteristics
Fast Model
Table 1–139
CCL
-1.166
-0.392
-1.166
-0.392
-1.166
-0.392
-1.166
-0.392
0.069
1.274
0.500
1.274
0.500
1.274
0.500
1.274
0.500
0.0
-2
=1.1V V
CCL
show the maximum I/O timing
V
1.1V
0.083
0.154
CCL
-2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-3
=1.1V V
Stratix III Device Handbook, Volume 2
=
-1.810 -1.943 -1.874 -2.327
-0.913 -1.037 -0.978 -0.865
-1.810 -1.943 -1.874 -2.327
-0.913 -1.037 -0.978 -0.865
-1.810 -1.943 -1.874 -2.327
-0.913 -1.037 -0.978 -0.865
-1.810 -1.943 -1.874 -2.327
-0.913 -1.037 -0.978 -0.865
V
1.971
1.074
1.971
1.074
1.971
1.074
1.971
1.074
1.1V
CCL
-3
CCL
=
0.118
0.14
-4
=1.1V V
2.118
1.212
2.118
1.212
2.118
1.212
2.118
1.212
V
1.1V
CCL
-4
=
CCL
2.041
1.145
2.041
1.145
2.041
1.145
2.041
1.145
V
1.1V
0.111
0.076
CCL
=1.1V V
=
-4L
-4L
V
2.488
1.026
2.488
1.026
2.488
1.026
2.488
1.026
0.9V
CCL
CCL
=
0.322
0.353
1–335
=0.9V
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
ns