EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 25

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
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TriMatrix Embedded Memory Blocks
TriMatrix embedded memory blocks provide three different sizes of
embedded SRAM to efficiently address the needs of Stratix III FPGA
designs. TriMatrix memory includes the following blocks:
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Each embedded memory block can be independently configured to be a
single- or dual-port RAM, ROM, or shift register via the Quartus II
MegaWizard. Multiple blocks of the same type can also be stitched
together to produce larger memories with minimal timing penalty.
TriMatrix memory provides up to 16,272 Kbits of embedded SRAM at up
to 600 MHz operation.
For more information on TriMatrix memory blocks, modes, features, and
design considerations, refer to the
Stratix III Devices
DSP Blocks
Stratix III devices have dedicated high-performance digital signal
processing (DSP) blocks optimized for DSP applications requiring high
data throughput. Stratix III devices provide you with the ability to
implement various high performance DSP functions easily. Complex
systems such as WiMAX, 3GPP WCDMA, CDMA2000, voice over
Internet protocol (VoIP), H.264 video compression and high-definition
television (HDTV) require high performance DSP blocks to process data.
These system designs typically use DSP blocks to implement finite
impulse response (FIR) filters, complex FIR filters, infinite impulse
response (IIR) filters, fast Fourier transform (FFT) functions, and discrete
cosine transform (DCT) functions.
Stratix III devices have up to 112 DSP blocks. The architectural highlights
of the Stratix III DSP block are the following:
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640-bit MLAB blocks optimized to implement filter delay lines, small
FIFO buffers and shift registers
9-Kbit M9K blocks that can be used for general purpose memory
applications
144-Kbit M144K blocks that are ideal for processor code storage,
packet and video frame buffering
High performance, power optimized, fully pipelined multiplication
operations
Native support for 9-bit, 12-bit, 18-bit, 36-bit word lengths
Native support for 18-bit complex multiplications
Efficient support for floating point arithmetic formats (24-bit for
Single Precision and 53-bit for Double Precision)
chapter in volume 1 of the Stratix III Device Handbook.
TriMatrix Embedded Memory Blocks in
Stratix III Device Handbook, Volume 1
Stratix III Device Family Overview
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