EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 262

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Termination Schemes for I/O Standards
Figure 7–28. Stratix III RSDS I/O Standard Termination
Note to
(1)
7–44
Stratix III Device Handbook, Volume 1
Termination
Termination
On-Board
External
OCT
The R
Figure
S
and R
7–28:
P
Transmitter
Transmitter
values are pending characterization.
One-Resistor Network (RSDS_E_1R)
RSDS
Stratix III devices support the RSDS output standard with a data rate up
to 230 Mbps using LVDS output buffer types. For transmitters, use the
two single-ended output buffers with the external one- or three-resistor
networks in the column I/O bank, as shown in
one-resistor topology is for a data rate of up to 200 Mbps. The
three-resistor topology is for a data rate of higher than 200 Mbps. The row
I/O banks support RSDS output using dedicated LVDS output buffers
without an external resistor network.
A resistor network is required to attenuate the LVDS output-voltage
swing to meet the RSDS specifications. You can modify the three-resistor
network values to reduce power or improve the noise margin. The
resistor values chosen should satisfy the following equation:
Altera recommends that you perform additional simulations using IBIS
models to validate that custom resistor values meet the RSDS
requirements.
≤1 inch
≤1 inch
R P
R P
50 Ω
50 Ω
50 Ω
50 Ω
100 Ω
100 Ω
Stratix III OCT
Receiver
Receiver
Note (1)
Transmitter
Transmitter
Three-Resistor Network (RSDS_E_3R)
R S
R S
R S
R S
≤
≤1 inch
1 inch
R P
R P
Figure
50
50 Ω
50
50 Ω
7–28. The
Altera Corporation
100 Ω
100
November 2007
Stratix III OCT
Ω
Receiver
Receiver