M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 72

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

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7.6.3 Stop Mode
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In stop mode, all oscillator circuits are turned off, so are the CPU clock and the peripheral function clocks.
Therefore, the CPU and the peripheral functions clocked by these clocks stop operating. The least
amount of power is consumed in this mode. If the voltage applied to Vcc pin is V
RAM is retained. When applying 2.7 or less voltage to Vcc pin, make sure Vcc V
However, the peripheral functions clocked by external signals keep operating. The following interrupts
can be used to exit stop mode.
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7.6.3.1 Entering Stop Mode
7.6.3.2 Pin Status during Stop Mode
7.6.3.3 Exiting Stop Mode
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The microcomputer is placed into stop mode by setting the CM10 bit in the CM1 register to “1” (all
clocks turned off). At the same time, the CM06 bit in the CM0 register is set to “1” (divide-by-8 mode)
and the CM15 bit in the CM10 register is set to “1” (main clock oscillator circuit drive capability high).
Before entering stop mode, set the CM20 bit to “0” (oscillation stop, re-oscillation detection function
disable).
Also, if the CM11 bit is “1” (PLL clock for the CPU clock source), set the CM11 bit to “0” (main clock for
the CPU clock source) and the PLC07 bit to “0” (PLL turned off) before entering stop mode.
The I/O pins retain their status held just prior to entering stop mode.
The microcomputer is moved out of stop mode by a hardware reset, NMI interrupt or peripheral func-
tion interrupt.
If the microcomputer is to be moved out of stop mode by a hardware reset or NMI interrupt, set the
peripheral function interrupt priority ILVL2 to ILVL0 bits to “000
CM10 bit to “1”.
If the microcomputer is to be moved out of stop mode by a peripheral function interrupt, set up the
following before setting the CM10 bit to “1”.
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1. In the ILVL2 to ILVL0 bits in the interrupt control register, set the interrupt priority level of the
2. Set the I flag to “1”.
3. Enable the peripheral function whose interrupt is to be used to exit stop mode.
Which CPU clock will be used after exiting stop mode by a peripheral function or NMI interrupt is
determined by the CPU clock that was on when the microcomputer was placed into stop mode as
follows:
If the CPU clock before entering stop mode was derived from the sub clock
If the CPU clock before entering stop mode was derived from the main clock
If the CPU clock before entering stop mode was derived from the on-chip oscillator clock: on-chip oscillator clock
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• NMI interrupt
• Key interrupt
• INT interrupt
• Timer A, Timer B interrupt (when counting external pulses in event counter mode)
• Serial I/O interrupt (when external clock is selected)
• Voltage down detection interrupt
2
peripheral function interrupt to be used to exit stop mode.
Also, for all of the peripheral function interrupts not used to exit stop mode, set the ILVL2 to ILVL0
bits to “000
In this case, when an interrupt request is generated and the CPU clock is thereby turned on, an
interrupt service routine is executed.
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(refer to 5.5.1 Voltage Down Detection Interrupt for an operating condition)
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” (interrupts disable) before setting the
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7. Clock Generation Circuit
RAM
: sub clock
: main clock divide-by-8
RAM
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or more, the internal
.
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divide-by-8