M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 255

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

M
R
R
e
E
1
. v
J
6
Figure 17.3.1.1. ROMCP Address
Figure 17.3.2.1. Address for ID Code Stored
0
C
2
9
0 .
2 /
B
0
0
6
2
ROM Code Protect Control Address
NOTES:
A
b7
0
F
2
e
G
1. When the ROM code protect is active by the ROMCP1 bit setting, the flash memory is protected
2. Set the bit 5 to bit 0 to 111111
3. To make the ROM code protection inactive, erase a block including the ROMCP address in standard
4. The ROMCP address is set to FF
5. When a value of the ROMCP address is 00
0 -
b6
b
o r
1 .
against reading or rewriting in parallel I/O mode.
0 are set to values other than 111111
ROMCP1 bit to a value other than 11
serial I/O mode or CPU rewrite mode.
2
0
u
b5
, 5
1
0
p
2
b4
1
(
0
M
0
b3
1
1
7
6
0FFFF3
0FFFF7
C
0FFFDF
0FFFE3
0FFFE7
0FFFEB
0FFFFB
0FFFFF
b2
0FFFEF
page 236
1
2 /
b1
1
6
, A
b0
1
Address
M
16
16
16
16
16
16
16
16
16
Bit Symbol
1
ROMCP1
f o
(b5-b0)
to 0FFFF0
to 0FFFF4
6
to 0FFFFC
to 0FFFE0
to 0FFFE4
to 0FFFE8
to 0FFFEC
to 0FFFF8
to 0FFFDC
Symbol
ROMCP
C
3
2
2 /
9
6
, B
2
when the ROMCP1 bit is set to a value other than 11
Reserved Bit
ROM Code Protect Level
1 Set Bit
M
16
16
16
1
16
16
16
16
16
when a block, including the ROMCP address, is erased.
16
16
6
2
(5)
2
.
C
, the ROM code protection may not become active by setting the
2 /
ROMCP
ID1
ID2
ID3
ID4
ID5
ID6
ID7
Bit Name
(1, 2, 3, 4)
6
Address
0FFFFF
16
) T
or FF
16
16
Undefined instruction vector
Overflow vector
BRK instruction vector
Address match vector
Single step vector
Watchdog timer vector
DBC vector
NMI vector
Reset vector
, the ROM code protect function is disabled.
4 bytes
b7 b6
00:
01:
10:
11: Disables protect
Set to 1
Factory Setting
FF
16
}
(4)
Enables protect
Function
17. Flash Memory Version
2
. If the bit 5 to bit
RW
RW
RW
RW