PG-FP5-EA Renesas Electronics America, PG-FP5-EA Datasheet - Page 197

• Manufacturer Part Number: PG-FP5-EA
• Description: PROGRAMMER FLASH MEMORY UNIV
• Manufacturer: Renesas Electronics America

Specifications of PG-FP5-EA

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PG-FP5
using equivalent circuits.
11.1 SO/TxD, RESET
protected so that user V
μ
11.2 SI/RxD and H/S
R20UT0008EJ0400 Rev. 4.00
Jul 15, 2010
PD78F9334 is used, the SO/TxD signal line functions as an open-drain output.
This chapter describes the target interface specifications (signals connected to the FP5 and the target system), by
When V
In either case, these signal lines output C-MOS level signals. When a 78K0R, 78K0S/Kx1+ microcontrollers or the
The SI/RxD input signal voltages must not exceed the rated maximum voltage.
DD
Pull-up control
Self-testing circuit
Signal output
/V
Self-testing
Signal input
or signal input
DD2
circuit
circuit
circuit
¯¯¯¯¯¯ and SCK
circuit
circuit
are supplied from the target system for target device programming, the FP5 internal voltage regulator is
CHAPTER 11 SPECIFICATIONS OF TARGET INTERFACE CIRCUITS
DD
/V
DD2
74LV125
74LV125
74LV125
74LV125
will not affect the SO/TxD, RESET
74LV125
FP5_V
FP5_V
Figure 11-1. SO/TxD, RESET
FP5_V
FP5_V
FP5_V
CHAPTER 11 SPECIFICATIONS OF TARGET INTERFACE CIRCUITS
DD
DD
Figure 11-2. SI/RxD and H/S Pins
DD
DD
DD
33 Ω
33 Ω
¯¯¯¯¯¯ and SCK signal lines.
100 kΩ
¯¯¯¯¯¯ and SCK Pins
1 kΩ
FP5
FP5
Target System
Target System
Signal
Signal
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