R0K561668S000BE Renesas Electronics America, R0K561668S000BE Datasheet - Page 925

• Manufacturer Part Number: R0K561668S000BE
• Description: KIT STARTER FOR H8SX/1668
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of R0K561668S000BE

• For Use With/related Products: H8SX/1668
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Contents: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Item
Section 1. CPU
1.5.2
1.8.5
Post-Increment, Pre-Decrement,
Pre-Increment,or Post-Decrement
—@ERn+, @−ERn, @+ERn, or
@ERn−
Section 2 Instruction
Descriptions
2.2.12
[8] Note
2.2.13
[8] Note
2.2.25
Cleared
[4] Description
2.2.26
Set
[4] Description
Program Counter (PC)
Register Indirect with
BFLD
BFST
BRA/BC BRAnch if Bit
BRA/BS BRAnch if Bit
Main Revisions and Additions in this Edition
Bit Field LoaD
Bit Field STore
Page Revision (See Manual for Details)
13
40
76
78
100
102
Deleted
The length of all CPU instructions is 16 bits (one word)
or a multiple of 16 bits, so the least significant bit is
ignored. (When the instruction code is fetched, the
least significant bit is regarded as 0)
Added
Example 3:
XOR.B R0L, @ER0+
When the value in ER0 before execution is
H'00001234, location H'00001234 is read, the read
data is EORed with H'35, and the result is written to
location H'00001234.The value in ER0 after execution
is H'00001235.
Added
The immediate data that specifies a bit field is limited to
consecutive bits with the value 1.
Added
The immediate data that specifies a bit field is limited to
consecutive bits with the value 1.
Amended
...The displacement is a signed 8-bit or 16-bit value.
The signed 8- or 16-bit displacement is capable of
specifying branch destination addresses in the range
from −128 to +126 bytes or from −32768 to +32766
bytes relative to the address that follows this
instruction.
Amended
...The displacement is a signed 8-bit or 16-bit value.
The signed 8- or 16-bit displacement is capable of
specifying branch destination addresses in the range
from −128 to +126 bytes or from −32768 to +32766
bytes relative to the address that follows this
instruction.
Rev. 4.00 Sep. 18, 2008 Page 907 of 914
REJ09B0102-0400