R0K561668S000BE Renesas Electronics America, R0K561668S000BE Datasheet - Page 921
R0K561668S000BE
Manufacturer Part Number
R0K561668S000BE
Description
KIT STARTER FOR H8SX/1668
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Specifications of R0K561668S000BE
For Use With/related Products
H8SX/1668
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Contents
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 921 of 936
- Download datasheet (12Mb)
The H8SX CPU is basically driven by a system clock, denoted by the symbol φ. The period from
one rising edge of φ to the next is referred to as a "state." The memory cycle or bus cycle consists
of one or two states. Different methods are used to access on-chip memory, on-chip peripheral
modules, and the external address space. For details, see the hardware manual for the
corresponding product.
4.1
On-chip memory is accessed in one state. The data bus width is 32 bits, permitting byte, word, and
longword accesses. Figure 4.1 shows the on-chip memory access cycle.
On-Chip Memory (ROM, RAM) Access Timing
φ
Internal address bus
Read
access
Write
access
Figure 4.1 On-Chip Memory Access Cycle
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Section 4 Basic Timing
Bus cycle
Address
T
1
Rev. 4.00 Sep. 18, 2008 Page 903 of 914
Read data
Write data
Section 4 Basic Timing
REJ09B0102-0400
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