R0K561668S000BE Renesas Electronics America, R0K561668S000BE Datasheet - Page 10

• Manufacturer Part Number: R0K561668S000BE
• Description: KIT STARTER FOR H8SX/1668
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of R0K561668S000BE

• For Use With/related Products: H8SX/1668
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Contents: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Section 2 Instruction Descriptions....................................................................... 47
2.1
2.2
Rev. 4.00 Sep. 18, 2008 Page viii of xii
1.8.7
1.8.8
1.8.9
1.8.10
1.8.11
1.8.12
1.8.13
Tables and Symbols ............................................................................................................ 47
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.1.6
Instruction Descriptions...................................................................................................... 53
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
2.2.14
2.2.15
2.2.16
2.2.17
2.2.18
2.2.19
2.2.20
2.2.21
2.2.22
Immediate—#xx ................................................................................................. 41
Program-Counter Relative—@(d:8, PC) or @(d:16, PC): ................................. 41
Program-Counter Relative with Index Register—@(RnL.B, PC),
@(Rn.W, PC), or @(ERn.L, PC)........................................................................ 42
Memory Indirect—@@aa:8 ............................................................................... 42
Extended Memory Indirect—@@vec:7 ............................................................. 43
Effective Address Calculation ............................................................................ 43
MOVA Instruction.............................................................................................. 45
Assembly-Language Format............................................................................... 48
Operation ............................................................................................................ 49
Condition Code................................................................................................... 50
Instruction Format .............................................................................................. 50
Register Specification ......................................................................................... 51
Bit Data Access in Bit Manipulation Instructions............................................... 52
ADD
ADDS
ADDX
AND
ANDC
ANDC
BAND
Bcc
BCLR
BCLR/EQ
BCLR/NE
BFLD
BFST
BIAND
BILD
BIOR
BIST
BISTZ
BIXOR
BLD
BNOT
BOR
ADD Binary............................................................................ 53
ADD with Sign extension ....................................................... 56
ADD with eXtend carry.......................................................... 58
AND logical............................................................................ 60
AND Control register ............................................................. 63
AND Control register ............................................................. 64
Bit AND.................................................................................. 65
Branch conditionally............................................................... 67
Bit CLeaR ............................................................................... 69
Bit CLeaR if EQual ................................................................ 71
Bit CLeaR if Not Equal .......................................................... 73
Bit Field LoaD ........................................................................ 75
Bit Field STore ....................................................................... 77
Bit Invert AND ....................................................................... 79
Bit Invert LoaD....................................................................... 81
Bit Invert inclusive OR ........................................................... 83
Bit Invert STore ...................................................................... 85
Bit Invert STore Zero flag ...................................................... 87
Bit Invert eXclusive OR ......................................................... 89
Bit LoaD ................................................................................. 91
Bit NOT .................................................................................. 93
Bit inclusive OR ..................................................................... 95