SI5325/26-EVB Silicon Laboratories Inc, SI5325/26-EVB Datasheet - Page 7

BOARD EVAL FOR SI5325/26

SI5325/26-EVB

Manufacturer Part Number
SI5325/26-EVB
Description
BOARD EVAL FOR SI5325/26
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5325/26-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5325, SI5326
Processor To Be Evaluated
Si5325 and Si5326
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Input
Clock
Sources*
Control Mode (H)
Input
Clock
Sources*
Figure 3. Si5325 Typical Application Circuit (SPI Control Mode)
Figure 2. Si5325 Typical Application Circuit (I
Control Mode (L)
Reset
130 
130 
Reset
82 
82 
130 
130 
82 
82 
V
V
DD
DD
V
V
DD
DD
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
130 
130 
82 
82 
130 
130 
82 
82 
*Note:
*Note:
System
Power
Supply
System
Supply
Power
Assumes differential LVPECL termination (3.3 V) on clock inputs.
CKIN1+
CKIN1–
CKIN2+
CKIN2–
CMODE
RST
Assumes differential LVPECL termination (3.3 V) on clock inputs.
CKIN1+
CKIN1–
CKIN2+
CKIN2–
CMODE
RST
Preliminary Rev. 0.4
Ferrite
Ferrite
Bead
Bead
Si5325
Si5325
C
C
C
C
C
C
C
C
3
2
1
4
3
2
1
4
1 µF
0.1 µF
0.1 µF
0.1 µF
1 µF
0.1 µF
0.1 µF
0.1 µF
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
INT_C1B
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
INT_C1B
A[2:0]
SDA
SCL
SCLK
C2B
SDO
SDI
C2B
SS
2
0.1 µF
0.1 µF
0.1 µF
0.1 µF
100 
100 
C Control Mode)
0.1 µF
0.1 µF
0.1 µF
0.1 µF
100 
100 
Interrupt/CKIN_1 Invalid Indicator
CKIN_2 Invalid Indicator
Serial Port Address
Serial Data
Serial Clock
+
+
Interrupt/CLKIN_1 Invalid Indicator
CLKIN_2 Invalid Indicator
Slave Select
Serial Data Out
Serial Data In
Serial Clock
+
+
Clock Outputs
I
2
Clock Outputs
C Interface
SPI Interface
Si5325
7

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