SI5325/26-EVB Silicon Laboratories Inc, SI5325/26-EVB Datasheet - Page 14

• Manufacturer Part Number: SI5325/26-EVB
• Description: BOARD EVAL FOR SI5325/26
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5325/26-EVB

• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: SI5325, SI5326
• Processor To Be Evaluated: Si5325 and Si5326
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si5325
4. Register Descriptions
Reset value = 0001 0100
14
Register 0.
Name
Type
Bit
7:6
4:2
Bit
5
1
0
ALWAYS_ON
Reserved
BYPASS_
Reserved
Reserved
Reserved
CKOUT_
Name
D7
REG
R
Reserved
Reserved.
CKOUT Always On.
This will bypass the SQ_ICAL function. Output will be available even if SQ_ICAL is on
and ICAL is not complete or successful. See Table 4 on page 46.
0: Squelch output until part is calibrated (ICAL).
1: Provide an output. Note: The frequency may be significantly off until the part is cali-
brated.
Reserved.
Bypass Register.
This bit enables or disables the PLL bypass mode. Use only when the device is in VCO
freeze or before the first ICAL. Bypass mode is not supported for CMOS output clocks.
0: Normal operation
1: Bypass mode. Selected input clock is connected to CKOUT buffers, bypassing PLL.
Reserved.
D6
R
ALWAYS_
CKOUT_
R/W
ON
D5
Preliminary Rev. 0.4
Reserved
D4
R
Reserved
Function
D3
R
Reserved
D2
R
BYPASS_
REG
R/W
D1
Reserved
D0
R