SI5325/26-EVB Silicon Laboratories Inc, SI5325/26-EVB Datasheet - Page 24

BOARD EVAL FOR SI5325/26

SI5325/26-EVB

Manufacturer Part Number
SI5325/26-EVB
Description
BOARD EVAL FOR SI5325/26
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5325/26-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5325, SI5326
Processor To Be Evaluated
Si5325 and Si5326
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si5325
Reset value = 1111 1111
24
Register 21.
Name
Type
7:2
Bit
Bit
1
0
CK1_ACTV_PIN CK1_ACTV_PIN.
Reserved
CKSEL_PIN
Reserved
D7
R
Name
Force 1
D6
Reserved.
The CK1_ACTV_REG status bit can be reflected to the CS_CA output pin using the
CK1_ACTV_PIN enable function. CK1_ACTV_PIN is of consequence only when pin
controlled clock selection is being used.
0: CS_CA output pin tristated.
1: Clock Active status reflected to output pin.
CKSEL_PIN.
If manual clock selection is being used, clock selection can be controlled via the
CKSEL_REG[1:0] register bits or the CS_CA input pin. This bit is only active when
AUTOSEL_REG = Manual.
0: CS_CA pin is ignored. CKSEL_REG[1:0] register bits control clock selection.
1: CS_CA input pin controls clock selection.
D5
R
Reserved
Preliminary Rev. 0.4
D4
R
D3
R
Function
D2
R
CK1_ACTV_PIN
R/W
D1
CKSEL_ PIN
R/W
D0

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