MT4VDDT3232UY-6K1 Micron Technology Inc, MT4VDDT3232UY-6K1 Datasheet - Page 19

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MT4VDDT3232UY-6K1

Manufacturer Part Number
MT4VDDT3232UY-6K1
Description
MODULE DDR 128MB 167MHZ 172-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT4VDDT3232UY-6K1

Memory Type
DDR SDRAM
Memory Size
128MB
Speed
333MT/s
Package / Case
172-UDIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
100UDIMM
Device Core Size
32b
Organization
32Mx32
Total Density
128MByte
Chip Density
256Mb
Access Time (max)
700ps
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
700mA
Number Of Elements
4
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
100
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
pdf: 09005aef808da768, source: 09005aef808d2e9a
DD4C16_32x32UG.fm - Rev. D 9/04 EN
30.
31. READs and WRITEs with auto precharge are not
32. Any positive glitch to the nominal voltage must be
33. Normal Output Drive Curves:
34. Reduced Output Drive Curves:
t
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
allowed to be issued until
fied prior to the internal precharge command
being issued.
less than 1/3 of the clock and not more than
+400mV or 2.9 volts maximum, whichever is less.
Any negative glitch must be less than 1/3 of the
clock cycle and not exceed either -300mV or 2.2
volts minimum, whichever is more positive.
a. The full variation in driver pull-down current
HP min is the lesser of
a. The full variation in driver pull-down current
b. The variation in driver pull-down current
c. The full variation in driver pull-up current
d. The variation in driver pull-up current within
e. The full variation in the ratio of the maximum
f. The full variation in the ratio of the nominal
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 8,
Pull-Down Characteristics, on page 20.
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 8, Pull-Down Characteristics,
on page 20.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 8,
Pull-Down Characteristics, on page 20.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of
Figure 8,
page 20.
to minimum pull-up and pull-down current
should be between 0.71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0V, and
at the same voltage and temperature.
pull-up to pull-down current should be unity
±10 percent, for device drain-to-source volt-
ages from 0.1V to 1.0V.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 10,
Reduced Output Pull-Down Characteristics,
on page 20.
Pull-Down Characteristics,
t
t
CL minimum and
RAS (MIN) can be satis-
t
CH
on
19
35.
36.
37. During initialization, V
38. The current Micron part operates below the slow-
39. For the -6 and -75 I
40. V
t
t
over
t
referenced to a specific voltage level but specify
when the device output is no longer driving
(
be equal to or less than V
V
even if V
mum of 42 ohms of series resistance is used
between the V
est JEDEC operating frequency of 83 MHz. As
such, future die may not reflect this option.
per DDR SDRAM at 100 MHz.
pulse width
greater than 1/3 of the cycle rate. V
V
pulse width can not be greater than 1/3 of the
cycle rate.
b. The variation in driver pull-down current
d. The variation in driver pull-up current within
c. The full variation in driver pull-up current
e. The full variation in the ratio of the maximum
HZ (MAX) will prevail over
RPST (MAX) condition.
RPST end point and
f. The full variation in the ratio of the nominal
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RPST), or begins driving (
TT
IH
IL
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 10, Reduced Output Pull-Down
Characteristics, on page 20.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 11,
Reduced Output Pull-Up Characteristics, on
page 20.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of
Figure 11, Reduced Output Pull-Up Character-
istics, on page 20.
to minimum pull-up and pull-down current
should be between 0.71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0V, and
at the same voltage.
pull-up to pull-down current should be unity
±10 percent, for device drain-to-source volt-
ages from 0.1V to 1.0V.
(MIN) = -1.5V for a pulse width
may be 1.35V maximum during power up,
t
overshoot: V
DQSCK (MIN) +
DD
64MB, 128MB (x32, SR)
/V
TT
3ns and the pulse width can not be
100-PIN DDR UDIMM
DDQ
supply and the input pin.
IH
are 0 volts, provided a mini-
DD
(MAX) = V
t
RPRE (MAX) condition.
t
3N is specified to be 35mA
RPRE begin point are not
DD
©2004 Micron Technology, Inc. All rights reserved.
DD
t
Q, V
t
LZ (MIN) will prevail
RPRE).
+ 0.3V. Alternatively,
TT
t
DQSCK (MAX) +
DD
, and V
Q + 1.5V for a
IL
undershoot:
3ns and the
REF
must

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