MT46H8M32LFB5-75:A TR Micron Technology Inc, MT46H8M32LFB5-75:A TR Datasheet - Page 51

IC DDR SDRAM 256MBIT 90VFBGA

MT46H8M32LFB5-75:A TR

Manufacturer Part Number
MT46H8M32LFB5-75:A TR
Description
IC DDR SDRAM 256MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46H8M32LFB5-75:A TR

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
133MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 9:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
CKE
H
H
H
H
H
L
L
L
L
L
L
L
L
n - 1
CKE
H
H
H
H
H
L
L
L
L
L
L
L
L
Truth Table – CKE
Notes 1–5 apply to all commands in this table
n
Notes:
Active power-down
Deep power-down
(Precharge) power-down
SELF REFRESH
Active power-down
Deep power-down
(Precharge) Power-down
SELF REFRESH
Bank(s) active
All banks idle
All banks idle
All banks idle
Current State
10. 200µs of valid clocks and NOP (or DESELECT) commands are required before any other valid
11. Upon exit from deep power-down mode and after the 200µs, a PRECHARGE ALL command
1. CKE
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5.
6. DESELECT or NOP commands should be issued on any clock edges occurring during the
7. The clock must toggle at least one time during the
8. DESELECT or NOP commands should be issued on any clock edges occurring during the
9. The clock must toggle at least one time during the
clock edge.
MAND
t
period.
period.
command is allowed.
is required, followed by the standard initialization sequence.
CKE pertains.
n
is the logic state of CKE at clock edge n; CKE
n
.
n
is the command registered at clock edge n; and ACTION
See Table 11 on page 54
BURST TERMINATE
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
Command
51
X
X
X
X
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
Action
Maintain active power-down
Maintain deep power-down
Maintain (precharge) power-down
Maintain SELF REFRESH
Exit active power-down
Exit deep power-down
Exit (precharge) power-down
Exit SELF REFRESH
Active power-down entry
Deep power-down entry
(Precharge) Power-down entry
SELF REFRESH entry
n - 1
t
t
XP period.
XSR period.
n
was the state of CKE at the previous
©2005 Micron Technology, Inc. All rights reserved.
n
is a result of COM-
Operations
Notes
10, 11
6, 7
6, 7
8, 9
t
t
XSR
XP

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