M34E02-FDW1TP STMicroelectronics, M34E02-FDW1TP Datasheet - Page 9

• Manufacturer Part Number: M34E02-FDW1TP
• Description: IC EEPROM 2KBIT 400KHZ 8TSSOP
• Manufacturer: STMicroelectronics

Specifications of M34E02-FDW1TP

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-TSSOP
• Organization: 256 K x 8
• Interface Type: 2-Wire
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 900 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.7 V
• Maximum Operating Current: 2 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 1.7 V, 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8654-2; M34E02-FDW1TP

M34E02
2.5
2.5.1
2.5.2
2.5.3
2.5.4
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
within the specified [V
secure a stable DC supply voltage, it is recommended to decouple the V
suitable capacitor (usually of the order of 10 nF to 100 nF) close to the V
pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
Power-up conditions
The V
defined in
Device reset
In order to prevent inadvertent write operations during power-up, a power-on reset (POR)
circuit is included. At power-up, the device does not respond to any instruction until V
reaches the internal reset threshold voltage (this threshold is lower than the minimum V
operating voltage defined in
When V
Power mode. However, the device must not be accessed until V
stable V
In a similar way, during power-down (continuous decrease in V
below the power-on reset threshold voltage, the device stops responding to any instruction
sent to it.
Power-down conditions
During power-down (continuous decrease in V
mode (mode reached after decoding a Stop condition, assuming that there is no internal
write cycle in progress).
Figure 4.
CC
100
CC
CC
10
4 kΩ
voltage has to rise continuously from 0 V up to the minimum V
1
Table 8
10
passes over the POR threshold, the device is reset and enters the Standby
voltage within the specified [V
Here R bus × C bus = 120 ns
Maximum R
and the rise time must not vary faster than 1 V/µs.
30 pF
CC
Bus line capacitor (pF)
(min), V
P
CC
value versus bus parasitic capacitance (C) for an I
100
Table
)
Doc ID 10367 Rev 9
CC
8).
CC
(max)] range must be applied (see
CC
(min), V
1000
CC
When t
f
time constant must be below the
400 ns time constant line
represented on the left.
), the device must be in Standby Power
C
= 400 kHz), the R bus × C bus
CC
LOW
(max)] range.
= 1.3 µs (min value for
CC
CC
), as soon as V
reaches a valid and
I²C bus
master
Table
CC
Signal description
CC
CC
SCL
SDA
operating voltage
W
/V
line with a
8). In order to
).
SS
V
CC
CC
R
C
CC
package
bus
bus
2
C bus
voltage
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drops
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CC
CC
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