Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 94

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Z8F011ASH020EG2156

Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet

Specifications of Z8F011ASH020EG2156

Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
PS025113-1212
Observe the following steps for configuring a timer for PWM DUAL OUTPUT Mode and
for initiating the PWM operation:
1. Write to the Timer Control Register to:
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
3. Write to the PWM High and Low Byte registers to set the PWM value.
4. Write to the PWM Control Register to set the PWM deadband delay value. The dead-
5. Write to the Timer Reload High and Low Byte registers to set the reload value (PWM
6. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing
7. Configure the associated GPIO port pin for the timer output and timer output comple-
8. Write to the Timer Control Register to enable the timer and initiate counting.
The PWM period is represented by the following equation:
PWM Period (s)
If an initial starting value other than
registers, the ONE-SHOT Mode equation determines the first PWM time-out period.
If
by:
TPOL
cally
reset in PWM Mode, counting always begins at the reset value of
band delay must be less than the duration of the positive phase of the PWM signal (as
defined by the PWM High and Low Byte registers). It must also be less than the dura-
tion of the negative phase of the PWM signal (as defined by the difference between
the PWM registers and the Timer Reload registers).
period). The reload value must be greater than the PWM value.
to the relevant interrupt registers.
ment alternate functions. The timer output complement function is shared with the
timer input function for both timers. Setting the timer mode to DUAL PWM will auto-
matically switch the function from timer-in to timer-out complement.
Disable the timer
Configure the timer for PWM DUAL OUTPUT Mode; setting the mode also
involves writing to TMODEHI bit in the TxCTL1 Register
Set the prescale value
Set the initial logic level (High or Low) and PWM High/Low transition for the
timer output alternate function
is set to 0, the ratio of the PWM output high time to the total period is represented
0001H
). This write only affects the first pass in PWM Mode. After the first timer
=
------------------------------------------------------------------------
System Clock Frequency (Hz)
Reload Value Prescale
0001H
is loaded into the Timer High and Low Byte
Z8 Encore!
Product Specification
0001H
®
F0830 Series
.
Operation
76

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