Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 121

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Z8F011ASH020EG2156

Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet

Specifications of Z8F011ASH020EG2156

Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
PS025113-1212
Bit
Field
RESET
R/W
Address
Bit
[7:0]
ADCDH
Bit
Field
RESET
R/W
Address
Bit
[7:6]
ADCDL
[5:0]
ADC Data High Byte Register
ADC Data Low Bits Register
Description
ADC High Byte
00h–FFh = The last conversion output is held in the data registers until the next ADC conver-
sion is completed.
Description
ADC Low Bits
00–11b = These bits are the two least-significant bits of the 10-bit ADC output. These bits are
undefined after a reset. The low bits are latched into this register whenever the ADC Data High
Byte Register is read.
Reserved
These bits are reserved and must be programmed to 000000.
7
7
The ADC Data High Byte Register, listed in Table 64, contains the upper eight bits of the
ADC output. Access to the ADC Data High Byte Register is read-only. Reading the ADC
Data High Byte Register latches data in the ADC Low Bits Register.
The ADC Data Low Bits Register, shown in Table 65, contains the lower bits of the ADC
output. Access to the ADC Data Low Bits Register is read-only. Reading the ADC Data
High Byte Register latches lower bits of the ADC in the ADC Data Low Bits Register.
ADCDL
X
R
Table 64. ADC Data High Byte Register (ADCD_H)
Table 65. ADC Data Low Bits Register (ADCD_L)
6
6
5
5
4
4
ADCDH
F72H
F73H
R
X
3
3
Reserved
X
R
ADC Control Register Definitions
Z8 Encore!
2
2
Product Specification
1
1
®
F0830 Series
0
0
103

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