Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 111

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
Watchdog Timer Refresh
Watchdog Timer Time-Out Response
Upon first enable, the Watchdog Timer is loaded with the value in the Watchdog Timer
Reload registers. The Watchdog Timer counts down to
tion is executed by the eZ8 CPU. Execution of the WDT instruction causes the downcoun-
ter to be reloaded with the WDT reload value stored in the Watchdog Timer Reload
registers. Counting resumes following the Reload operation.
When the Z8 Encore! F0830 Series devices are operating in DEBUG Mode (using the On-
Chip Debugger), the Watchdog Timer must be continuously refreshed to prevent any
WDT time-outs.
The Watchdog Timer times out when the counter reaches
Watchdog Timer generates either an interrupt or a system reset. The WDT_RES Flash
option bit determines the time-out response of the Watchdog Timer. See the
Bits
bit.
WDT Interrupt in Normal Operation
If configured to generate an interrupt when a time-out occurs, the Watchdog Timer issues
an interrupt request to the Interrupt Controller and sets the WDT status bit in the Reset
Status Register. If interrupts are enabled, the eZ8 CPU responds to the interrupt request by
fetching the Watchdog Timer interrupt vector and executing code from the vector address.
After time-out and interrupt generation, the Watchdog Timer counter resets to its maxi-
mum value of
automatically return to its reload value.
The Reset Status Register (see
WDT interrupt. This read clears the WDT time-out flag and prevents further WDT inter-
rupts occurring immediately.
WDT Interrupt in STOP Mode
If configured to generate an interrupt when a time-out occurs and the Z8 Encore! F0830
Series devices are in STOP Mode, the Watchdog Timer automatically initiates a Stop
Mode Recovery and generates an interrupt request. Both the WDT status bit and the STOP
bit in the Watchdog Timer Control Register are set to 1 following a WDT time-out in
STOP Mode. See the
mation about Stop Mode Recovery operations.
If interrupts are enabled, following completion of the Stop Mode Recovery, the eZ8 CPU
responds to the interrupt request by fetching the Watchdog Timer interrupt vector and exe-
cutes the code from the vector address.
chapter on page 124 for information about programming the WDT_RES Flash option
FFFFFH
Reset and Stop Mode Recovery
and continues counting. The Watchdog Timer counter will not
Table 12
on page 29) must be read before clearing the
chapter on page 21 for more infor-
000000H
000000H
Z8 Encore!
Product Specification
unless a WDT instruc-
. A time-out of the
®
F0830 Series
Flash Option
Operation
93