Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 59
Z8F011ASH020EG2156
Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F011AHJ020EG2156.pdf
(257 pages)
Specifications of Z8F011ASH020EG2156
Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS025113-1212
Bit
Field
RESET
R/W
Address
Bit
[7:0]
PCTL
Bit
Field
RESET
R/W
Address
Bit
[7:0]
DDx
Note: x indicates the specific GPIO port pin number (7–0).
Port A–D Control Registers
Port A–D Data Direction Subregisters
Description
Port Control
The Port Control Register provides access to all subregisters that configure the GPIO port
operation.
Description
Data Direction
These bits control the direction of the associated port pin. Port Alternate Function operation
overrides the Data Direction Register setting.
0 = Output. Data in the Port A–D Output Data Register is driven onto the port pin.
1 = Input. The port pin is sampled and the value written into the Port A–D Input Data Register.
R/W
DD7
R/W
If 01H in Port A–D Address Register, accessible through the Port A–D Control Register
The output driver is tristated.
7
7
1
The Port A–D Control registers, shown in Table 20, set the GPIO port operation. The
value in the corresponding Port A–D Address Register determines which subregister is
read from or written to by a Port A–D Control Register transaction.
The Port A–D Data Direction Subregister, shown in Table 21, is accessed through the Port
A–D Control Register by writing
Table 21. Port A–D Data Direction Subregisters (PxDD)
DD6
R/W
R/W
6
6
1
Table 20. Port A–D Control Registers (PxCTL)
R/W
DD5
R/W
5
5
1
FD1H, FD5H, FD9H, FDDH
01H
DD4
R/W
R/W
4
4
1
to the Port A–D Address Register.
PCTL
00H
R/W
DD3
R/W
3
3
1
GPIO Control Register Definitions
DD2
R/W
R/W
Z8 Encore!
2
2
1
Product Specification
R/W
DD1
R/W
1
1
1
®
F0830 Series
DD0
R/W
R/W
0
0
1
41
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