C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 90
C8051T622-GMR
Manufacturer Part Number
C8051T622-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
Manufacturer
Silicon Labs
Datasheet
1.C8051T622-GMR.pdf
(254 pages)
Specifications of C8051T622-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051T622/3 and C8051T326/7
SFR Definition 16.3. OSCICN: Internal H-F Oscillator Control
SFR Address = 0xB2
90
Name
Reset
4:2
1:0
Bit
Type
7
6
5
Bit
SUSPEND
IFCN[1:0]
IOSCEN
Unused
IFRDY
IOSCEN
Name
R/W
7
1
Internal H-F Oscillator Enable Bit.
0: Internal H-F Oscillator Disabled.
1: Internal H-F Oscillator Enabled.
Internal H-F Oscillator Frequency Ready Flag.
0: Internal H-F Oscillator is not running at programmed frequency.
1: Internal H-F Oscillator is running at programmed frequency.
Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The inter-
nal oscillator resumes operation when one of the SUSPEND mode awakening
events occurs.
Unused. Read = 000b; Write = Don’t Care
Internal H-F Oscillator Frequency Divider Control Bits.
The Internal H-F Oscillator is divided by the IFCN bit setting after a divide-by-4 stage.
00: SYSCLK can be derived from Internal H-F Oscillator divided by 8 (1.5 MHz).
01: SYSCLK can be derived from Internal H-F Oscillator divided by 4 (3 MHz).
10: SYSCLK can be derived from Internal H-F Oscillator divided by 2 (6 MHz).
11: SYSCLK can be derived from Internal H-F Oscillator divided by 1 (12 MHz).
IFRDY
R
6
1
SUSPEND
R/W
5
0
Rev. 1.1
R
4
0
Function
R
3
0
R
2
0
1
0
IFCN[1:0]
R/W
0
0
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