C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 3

• Manufacturer Part Number: C8051T622-GMR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
• Manufacturer: Silicon Labs

Specifications of C8051T622-GMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

Table of Contents
1. System Overview ..................................................................................................... 15
2. Ordering Information ............................................................................................... 18
3. Pin Definitions.......................................................................................................... 19
4. QFN-24 Package Specifications ............................................................................. 24
5. QFN-28 Package Specifications ............................................................................. 26
6. Electrical Characteristics ........................................................................................ 28
7. Voltage Regulators (REG0 and REG1)................................................................... 35
8. CIP-51 Microcontroller............................................................................................. 40
9. Prefetch Engine........................................................................................................ 49
10. Memory Organization ............................................................................................ 50
11. Special Function Registers................................................................................... 56
12. Interrupts ................................................................................................................ 60
13. Program Memory (EPROM)................................................................................... 71
6.1. Absolute Maximum Specifications..................................................................... 28
6.2. Electrical Characteristics ................................................................................... 29
6.3. Typical Performance Curves ............................................................................. 34
7.1. Voltage Regulator (REG0)................................................................................. 35
7.2. Voltage Regulator (REG1)................................................................................. 38
8.1. Instruction Set.................................................................................................... 41
8.2. CIP-51 Register Descriptions ............................................................................ 45
10.1. Program Memory............................................................................................. 50
10.2. Data Memory ................................................................................................... 51
12.1. MCU Interrupt Sources and Vectors................................................................ 60
12.2. Interrupt Register Descriptions ........................................................................ 61
12.3. INT0 and INT1 External Interrupt Sources ...................................................... 69
13.1. Programming the EPROM Memory................................................................. 71
13.2. Security Options .............................................................................................. 73
13.3. EPROM Writing Guidelines ............................................................................. 73
7.1.1. Regulator Mode Selection......................................................................... 35
7.1.2. VBUS Detection ........................................................................................ 35
8.1.1. Instruction and CPU Timing ...................................................................... 41
10.1.1. Derivative ID............................................................................................ 51
10.1.2. Serialization............................................................................................. 51
10.2.1. Internal RAM ........................................................................................... 51
10.2.2. External RAM .......................................................................................... 52
10.2.3. Accessing USB FIFO Space ................................................................... 53
12.1.1. Interrupt Priorities.................................................................................... 61
12.1.2. Interrupt Latency ..................................................................................... 61
13.1.1. EPROM Programming over the C2 Interface.......................................... 71
13.1.2. EPROM In-Application Programming...................................................... 72
10.2.1.1. General Purpose Registers ............................................................ 52
10.2.1.2. Bit Addressable Locations .............................................................. 52
10.2.1.3. Stack ............................................................................................ 52
C8051T622/3 and C8051T326/7
Rev. 1.1
3