C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 12

• Manufacturer Part Number: C8051T622-GMR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
• Manufacturer: Silicon Labs

Specifications of C8051T622-GMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

C8051T622/3 and C8051T326/7
List of Registers
SFR Definition 7.1. REG01CN: Voltage Regulator Control .......................................... 39
SFR Definition 8.1. DPL: Data Pointer Low Byte .......................................................... 46
SFR Definition 8.2. DPH: Data Pointer High Byte ......................................................... 46
SFR Definition 8.3. SP: Stack Pointer ........................................................................... 47
SFR Definition 8.4. ACC: Accumulator ......................................................................... 47
SFR Definition 8.5. B: B Register .................................................................................. 47
SFR Definition 8.6. PSW: Program Status Word .......................................................... 48
SFR Definition 9.1. PFE0CN: Prefetch Engine Control ................................................ 49
SFR Definition 10.1. EMI0CN: External Memory Interface Control .............................. 53
SFR Definition 10.2. EMI0CF: External Memory Configuration .................................... 55
SFR Definition 12.1. IE: Interrupt Enable ...................................................................... 63
SFR Definition 12.2. IP: Interrupt Priority ...................................................................... 64
SFR Definition 12.3. EIE1: Extended Interrupt Enable 1 .............................................. 65
SFR Definition 12.4. EIP1: Extended Interrupt Priority 1 .............................................. 66
SFR Definition 12.5. EIE2: Extended Interrupt Enable 2 .............................................. 67
SFR Definition 12.6. EIP2: Extended Interrupt Priority 2 .............................................. 68
SFR Definition 12.7. IT01CF: INT0/INT1 ConfigurationO ............................................. 70
SFR Definition 13.1. PSCTL: Program Store R/W Control ........................................... 75
SFR Definition 13.2. MEMKEY: EPROM Memory Lock and Key ................................. 75
SFR Definition 13.3. IAPCN: In-Application Programming Control ............................... 76
SFR Definition 14.1. PCON: Power Control .................................................................. 79
SFR Definition 15.1. VDM0CN: VDD Monitor Control .................................................. 83
SFR Definition 15.2. RSTSRC: Reset Source .............................................................. 85
SFR Definition 16.1. CLKSEL: Clock Select ................................................................. 88
SFR Definition 16.2. OSCICL: Internal H-F Oscillator Calibration ................................ 89
SFR Definition 16.3. OSCICN: Internal H-F Oscillator Control ..................................... 90
SFR Definition 16.4. CLKMUL: Clock Multiplier Control ............................................... 91
SFR Definition 16.5. OSCLCN: Internal L-F Oscillator Control ..................................... 92
SFR Definition 16.6. OSCXCN: External Oscillator Control .......................................... 96
SFR Definition 17.1. XBR0: Port I/O Crossbar Register 0 .......................................... 105
SFR Definition 17.2. XBR1: Port I/O Crossbar Register 1 .......................................... 106
SFR Definition 17.3. XBR2: Port I/O Crossbar Register 2 .......................................... 107
SFR Definition 17.4. P0MASK: Port 0 Mask Register ................................................. 108
SFR Definition 17.5. P0MAT: Port 0 Match Register .................................................. 108
SFR Definition 17.6. P1MASK: Port 1 Mask Register ................................................. 109
SFR Definition 17.7. P1MAT: Port 1 Match Register .................................................. 109
SFR Definition 17.8. P0: Port 0 ................................................................................... 110
SFR Definition 17.9. P0MDIN: Port 0 Input Mode ....................................................... 111
SFR Definition 17.10. P0MDOUT: Port 0 Output Mode .............................................. 111
SFR Definition 17.11. P0SKIP: Port 0 Skip ................................................................. 112
SFR Definition 17.12. P1: Port 1 ................................................................................. 112
SFR Definition 17.13. P1MDIN: Port 1 Input Mode ..................................................... 113
SFR Definition 17.14. P1MDOUT: Port 1 Output Mode .............................................. 113
12
Rev. 1.1