EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 56

• Manufacturer Part Number: EMC326SP16AK
• Description: 2mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Figure 45. Burst WRITE Interrupted by Burst WRITE or READ - Variable Latency Mode
Note:
1. Non-default BCR settings for burst WRITE interrupted by burst WRITE or READ in variable latency mode: Variable latency; latency code two
2. Burst interrupt shown on first allowable clock (i.e., after first data word written).
3. CE# can stay LOW between burst operations, but CE# must not remain LOW longer than t
(three clocks); WAIT active LOW; WAIT asserted during delay. All bursts shown for variable latency; no refresh collision.
DQ[15:0] IN
2nd Cycle WRITE
2nd Cycle WRITE
2nd Cycle WRITE
LB#/UB#
A[20:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
IH
IL
IH
IL
High-Z
DQ[15:0] OUT
t
t
Address
SP
t
t
2nd Cycle READ
2nd Cycle READ
SP
2nd Cycle READ
CSP
SP
Valid
LB#/UB#
t
t
t
HD
HD
HD
High-Z
OE#
V
V
V
V
V
V
IH
IL
IH
IL
OH
OL
t
CLK
t
t
SP
SP
D0
t
t
t
HD
SP
HD
t
CEW
t
t
t
SP
SP
SP
Address
Valid
t
t
t
t
HD
KHTL
HD
HD
V
V
OH
OL
WRITE Burst interrupted with new WRITE or READ. See Note 2.
High-Z
56
t
CEM
(Note 3)
t
ACLK
t
BOE
Output
t
Valid
SP
D0
CEM
t
HD
t
KOH
.
Output
Valid
D1
Output
Valid
D2
EMC326SP16AK
Don’t Care
Output
Valid
D3
2Mx16 CellularRAM
t
t
HD
HD
t
OHZ
High-Z
Undefined