EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 43

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EMC326SP16AK

Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
Figure 32. READ Burst Suspend
Note:
1. Non-default BCR settings for READ burst suspend: Fixed or variable latency; latency code two (three clocks); WAIT active LOW; WAIT asserted
2. CLK can be stopped LOW or HIGH, but must be static, with no LOW-to-HIGH transitions during burst suspend.
3. OE# can stay LOW during burst suspend. If OE# is LOW, DQ[15:0] will continue to output valid data.
during delay.
LB#/UB#
DQ[15:0]
A[20:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
OH
OL
High-Z
High-Z
t
t
Address
SP
t
t
t
CSP
SP
SP
SP
Valid
t
t
HD
HD
t
CLK
t
HD
t
OLZ
t
BOE
t
ACLK
Output
Valid
t
KOH
Output
Valid
43
t
CEM
Output
Valid
Output
Valid
t
OHZ
Note 3
t
OLZ
Note 2
EMC326SP16AK
Output
Don’t Care
Valid
t
BOE
2Mx16 CellularRAM
Output
Valid
t
t
Hz
t
OHZ
HD
t
CBPH
High-Z
Undefined
Address
Valid

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