EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 31

• Manufacturer Part Number: EMC326SP16AK
• Description: 2mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

TIMING REQUIREMENTS
Table 14: Asynchronous READ Cycle Timing Requirements
All tests performed with outputs configured for default setting of half drive strength, (BCR[5:4] = 01b).
Note:
1. The High-Z timings measure a 100mV transition from either V
2. The Low-Z timings measure a 100mV transition away from the High-Z (VccQ/2) level toward either V
3. Page mode enabled only.
4. Contact EMLSI for specific timing.
Address access time
ADV# access time
Page access time
Address hold from ADV# HIGH
Address setup to ADV# HIGH
LB#/UB# access time
LB#/UB# disable to DQ High-Z output
LB#/UB# enable to Low-Z output
Maximum CE# pulse width
CE# LOW to WAIT valid
Chip select access time
CE# LOW to ADV# HIGH
Chip disable to DQ and WAIT High-Z output
Chip enable to Low-Z output
Output enable to valid output
Output hold from address change
Output disable to DQ High-Z output
Output enable to Low-Z output
Page READ cycle time
READ cycle time
ADV# pulse width LOW
Parameter
Symbol
t
t
t
AADV
t
t
t
t
t
t
t
CEW
t
CEM
t
CVS
t
t
OHZ
t
t
t
AVH
AVS
t
BHZ
t
t
OLZ
t
APA
BLZ
CO
OH
AA
BA
HZ
OE
PC
RC
VP
LZ
OH
or V
OL
31
toward VccQ/2.
Min
10
10
20
70
2
5
1
7
5
3
5
-
-
-
-
-
-
-
-
-
-
70ns
Max
7.5
70
70
20
70
70
20
7
4
7
7
-
-
-
-
-
-
-
-
-
-
OH
or V
OL
EMC326SP16AK
.
2Mx16 CellularRAM
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
Note
4
1
2
3
1
2
1
2
4