EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 50
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
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Figure 39. Burst WRITE Operation - Variable Latency Mode
Note:
1. Non-default BCR settings for burst WRITE operation in variable latency mode: Latency code two (three clocks); WAIT active LOW; WAIT
2. WAIT asserts for LC cycles for both fixed and variable latency. LC = Latency Code (BCR[13:11]).
3. t
asserted during delay; burst length four; burst wrap enabled.
AS
required if t
LB#/UB#
DQ[15:0]
A[20:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
CSP
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
iH
iL
> 20ns.
High-Z
t
t
AS
AS
3
3
WRITE Burst Identified
t
t
t
SP
Valid Address
CSP
t
SP
t
CEW
SP
(WE# = Low)
t
t
HD
HD
t
HD
Note 2
50
t
KHTL
t
SP
t
CLK
t
CEM
t
SP
D1
t
HD
t
HD
t
KHKL
D2
D3
EMC326SP16AK
t
KP
2Mx16 CellularRAM
t
KP
D0
t
HD
t
HZ
t
Don’t Care
CBPH
High-Z
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