M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 60

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

Device Architecture
Figure 2-33 • Flash Memory Block Diagram
2- 44
OVERWRITEPROTECT
PAGELOSSPROTECT
UNPROTECTPAGE
OVERWRITEPAGE
DATAWIDTH[1:0]
LOCKREQUEST
DISCARDPAGE
PAGESTATUS
ERASEPAGE
SPAREPAGE
ADDDR[17:0]
STATUS[1:0]
READNEXT
AUXBLOCK
PROGRAM
WD[31 :0]
RD[31:0]
RESET
BUSY
Flash Memory Block Diagram
A simplified diagram of the flash memory block is shown in
The logic consists of the following sub-blocks:
The FB stores error correction information with each block to perform single-bit error correction and
double-bit error detection on all data blocks.
WEN
PIPE
REN
CLK
•
•
•
•
Flash Array
Contains all stored data. The flash array contains 64 sectors, and each sector contains 33 pages
of data.
Page Buffer
A page-wide volatile register. A page contains 8 blocks of data and an AUX block.
Block Buffer
Contains the contents of the last block accessed. A block contains 128 data bits.
ECC Logic
Output
MUX
Control
Logic
Block Buffer
(128 bits)
R e visio n 1
ECC
Logic
Figure
Page Buffer = 8 Blocks
Plus AUX Block
2-33.
Flash Array = 64 Sectors