M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 245

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

Security
Special Function Pins
NC
This pin is not connected to circuitry within the device. These pins can be driven to any voltage or can be
left floating with no effect on the operation of the device.
DC
This pin should not be connected to any signals on the PCB. These pins should be left unconnected.
NCAP
Negative Capacitor is where the negative terminal of the charge pump capacitor is connected. A
capacitor, with a 2.2 µF recommended value, is required to connect between PCAP and NCAP.
PCAP
Positive Capacitor is where the positive terminal of the charge pump capacitor is connected. A capacitor,
with a 2.2 µF recommended value, is required to connect between PCAP and NCAP.
PUB
Push button is the connection for the external momentary switch used to turn on the 1.5 V voltage
regulator and can be floating if not used.
PTBASE
Pass Transistor Base is the control signal of the voltage regulator. This pin should be connected to the
base of the external pass transistor used with the 1.5 V internal voltage regulator and can be floating if
not used.
PTEM
Pass Transistor Emitter is the feedback input of the voltage regulator.
This pin should be connected to the emitter of the external pass transistor used with the 1.5 V internal
voltage regulator and can be floating if not used.
XTAL1
Input to crystal oscillator circuit. Pin for connecting external crystal, ceramic resonator, RC network, or
external clock input. When using an external crystal or ceramic oscillator, external capacitors are also
recommended (Please refer to the crystal oscillator manufacturer for proper capacitor value).
If using external RC network or clock input, XTAL1 should be used and XTAL2 left unconnected.
XTAL2
Input to crystal oscillator circuit. Pin for connecting external crystal, ceramic resonator, RC network, or
external clock input. When using an external crystal or ceramic oscillator, external capacitors are also
recommended (Please refer to the crystal oscillator manufacturer for proper capacitor value).
If using external RC network or clock input, XTAL1 should be used and XTAL2 left unconnected.
Fusion devices have a built-in 128-bit AES decryption core. The decryption core facilitates secure, in-
system programming of the FPGA core array fabric and the FlashROM. The FlashROM and the FPGA
core fabric can be programmed independently from each other, allowing the FlashROM to be updated
without the need for change to the FPGA core fabric. The AES master key is stored in on-chip nonvolatile
memory (flash). The AES master key can be preloaded into parts in a secure programming environment
(such as the Actel in-house programming center), and then "blank" parts can be shipped to an untrusted
programming or manufacturing center for final personalization with an AES-encrypted bitstream. Late
stage product changes or personalization can be implemented easily and securely by simply sending a
STAPL file with AES-encrypted data. Secure remote field updates over public networks (such as the
Internet) are possible by sending and programming a STAPL file with AES-encrypted data. For more
information, refer to the
No Connect
Don't Connect
Negative Capacitor
Positive Capacitor
Push Button
Pass Transistor Base
Pass Transistor Emitter
Crystal Oscillator Circuit Input
Crystal Oscillator Circuit Input
Fusion Security
application note.
R e v i s i o n 1
Actel Fusion Family of Mixed Signal FPGAs
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