M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 41

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

Global Buffers with No Programmable Delays
The CLKBUF and CLKBUF_LVPECL/LVDS macros are composite macros that include an I/O macro
driving a global buffer, hardwired together
The CLKINT macro provides a global buffer function driven by the FPGA core.
The CLKBUF, CLKBUF_LVPECL/LVDS, and CLKINT macros are pass-through clock sources and do
not use the PLL or provide any programmable delay functionality.
Many specific CLKBUF macros support the wide variety of single-ended and differential I/O standards
supported by Fusion devices. The available CLKBUF macros are described in the
ProASIC3/E Macro Library
Figure 2-20 • Global Buffers with No Programmable Delay
CLKBUF_LVDS/LVPECL Macro
PADN
PADP
Y
Guide.
Clock Source
PAD
CLKBUF Macro
(Figure
R e v i s i o n 1
Y
2-20).
CLKINT Macro
A
Y
Actel Fusion Family of Mixed Signal FPGAs
Clock Conditioning
None
Fusion, IGLOO/e and
Output
GLA
or
GLB
or
GLC
2- 25